Datasheet

37
7701F–AVR–10/12
Atmel ATtiny24/44/84 [Preliminary]
8.8.3 Brown-out Detector
If the Brown-out Detector is not needed in the application, this module should be turned off. If
the Brown-out Detector is enabled by the BODLEVEL Fuses, it will be enabled in all sleep
modes, and hence, always consume power. In the deeper sleep modes, this will contribute
significantly to the total current consumption. See “Brown-out Detection” on page 43 for details
on how to configure the Brown-out Detector.
8.8.4 Internal Voltage Reference
The Internal Voltage Reference will be enabled when needed by the Brown-out Detection, the
Analog Comparator or the ADC. If these modules are disabled as described in the sections
above, the internal voltage reference will be disabled and it will not be consuming power.
When turned on again, the user must allow the reference to start up before the output is used.
If the reference is kept on in sleep mode, the output can be used immediately. See “Internal
Voltage Reference” on page 44 for details on the start-up time.
8.8.5 Watchdog Timer
If the Watchdog Timer is not needed in the application, this module should be turned off. If the
Watchdog Timer is enabled, it will be enabled in all sleep modes, and hence, always consume
power. In the deeper sleep modes, this will contribute significantly to the total current con-
sumption. See “Watchdog Timer” on page 44 for details on how to configure the Watchdog
Timer.
8.8.6 Port Pins
When entering a sleep mode, all port pins should be configured to use minimum power. The
most important thing is then to ensure that no pins drive resistive loads. In sleep modes where
both the I/O clock (clk
I/O
) and the ADC clock (clk
ADC
) are stopped, the input buffers of the
device will be disabled. This ensures that no power is consumed by the input logic when not
needed. In some cases, the input logic is needed for detecting wake-up conditions, and it will
then be enabled. See the section “Digital Input Enable and Sleep Modes” on page 60 for
details on which pins are enabled. If the input buffer is enabled and the input signal is left float-
ing or has an analog signal level close to V
CC
/2, the input buffer will use excessive power.
For analog input pins, the digital input buffer should be disabled at all times. An analog signal
level close to V
CC
/2 on an input pin can cause significant current even in active mode. Digital
input buffers can be disabled by writing to the Digital Input Disable Register (DIDR0). See
“DIDR0 – Digital Input Disable Register 0” on page 155 for details.