Datasheet

36
7701F–AVR–10/12
Atmel ATtiny24/44/84 [Preliminary]
When the BOD has been disabled, the wake-up time from sleep mode will be approximately
60µs to ensure that the BOD is working correctly before the MCU continues executing code.
BOD disable is controlled by the BODS (BOD Sleep) bit of MCU Control Register, see Section
8.9.1 “MCUCR – MCU Control Register” on page 38. Writing this bit to one turns off BOD in
Power-Down and Stand-By, while writing a zero keeps the BOD active. The default setting is
zero, i.e. BOD active.
Writing to the BODS bit is controlled by a timed sequence and an enable bit, see Section 8.9.1
“MCUCR – MCU Control Register” on page 38.
8.7 Power Reduction Register
The Power Reduction Register (PRR), see “PRR – Power Reduction Register” on page 39,
provides a method to stop the clock to individual peripherals to reduce power consumption.
The current state of the peripheral is frozen and the I/O registers cannot be read or written.
Resources used by the peripheral when stopping the clock will remain occupied; hence the
peripheral should in most cases be disabled before stopping the clock. Waking up a module,
which is done by clearing the bit in PRR, puts the module in the same state as before
shutdown.
Module shutdown can be used in Idle mode and Active mode to significantly reduce the overall
power consumption. See “Power-down Supply Current” on page 194 for examples. In all other
sleep modes, the clock is already stopped.
8.8 Minimizing Power Consumption
There are several issues to consider when trying to minimize the power consumption in an
AVR
®
-controlled system. In general, sleep modes should be used as much as possible, and
the sleep mode should be selected so that as few of the device's functions as possible are
operating. All functions not needed should be disabled. In particular, the following modules
may need special consideration when trying to achieve the lowest possible power
consumption.
8.8.1 Analog-to-Digital Converter
If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should be dis-
abled before entering any sleep mode. When the ADC is turned off and on again, the next
conversion will be an extended conversion. See “Analog-to-Digital Converter” on page 137 for
details on ADC operation.
8.8.2 Analog Comparator
When entering idle mode, the analog comparator should be disabled if not used. When enter-
ing ADC noise reduction mode, the analog comparator should be disabled. In the other sleep
modes, the analog comparator is automatically disabled. However, if the analog comparator is
set up to use the internal voltage reference as input, the analog comparator should be dis-
abled in all sleep modes. Otherwise, the internal voltage reference will be enabled,
independent of sleep mode. See “Analog Comparator” on page 134 for details on how to con-
figure the Analog Comparator.