Datasheet
34
7701F–AVR–10/12
Atmel ATtiny24/44/84 [Preliminary]
8. Power Management and Sleep Modes
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The Atmel
®
AVR
®
provides various sleep modes allowing the user to tailor the power
consumption to the application’s requirements.
8.1 Sleep Modes
Figure 7-1 on page 25 presents the different clock systems in the Atmel
®
ATtiny24/44/84, and
their distribution. The figure is helpful in selecting an appropriate sleep mode. Table 8-1 shows
the different sleep modes and their wake up sources
Note: 1. For INT0, only level interrupt.
2. Only recommended with external crystal or resonator selected as clock source
To enter any of the three sleep modes, the SE bit in MCUCR must be written to logic one and
a SLEEP instruction must be executed. The SM1..0 bits in the MCUCR Register select which
sleep mode (Idle, ADC Noise Reduction, Standby or Power-down) will be activated by the
SLEEP instruction. See Table 8-2 on page 38 for a summary.
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File
and SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep
mode, the MCU wakes up and executes from the Reset Vector.
8.2 Idle Mode
When the SM1..0 bits are written to “00”, the SLEEP instruction makes the MCU enter idle
mode, stopping the CPU but allowing the analog comparator, ADC, timer/counter, watch-
dog, and interrupt system to continue operating. This sleep mode basically halts clk
CPU
and
clk
FLASH
, while allowing the other clocks to run
.
Table 8-1. Active Clock Domains and Wake-up Sources in the Different Sleep Modes
Active Clock Domains Oscillators Wake-up Sources
Sleep Mode
clk
CPU
clk
FLASH
clk
IO
clk
ADC
Main Clock
Source Enabled
INT0 and
Pin Change
SPM/
EEPROM
Ready
ADC
Other I/O
Watchdog
Interrupt
Idle X X X X X X X X
ADC Noise
Reduction
XXX
(1)
XX X
Power-down X
(1)
X
Stand-by
(2)
XXX
(1)