Datasheet

172
7701F–AVR–10/12
Atmel ATtiny24/44/84 [Preliminary]
21.8 High-voltage Serial Programming Algorithm
To program and verify the Atmel
®
AVR
®
ATtiny24/44/84 in the high-voltage serial program-
ming mode, the following sequence is recommended (see instruction formats in Table 21-15
on page 175):
21.8.1 Enter High-voltage Serial Programming Mode
The following algorithm puts the device in High-voltage Serial Programming mode:
1. Apply 4.5 - 5.5V between V
CC
and GND.
2. Set RESET pin to “0” and toggle SCI at least six times.
3. Set the Prog_enable pins listed in Table 21-13 on page 171 to “000” and wait at least
100 ns.
4. Apply V
HVRST
- 5.5V to RESET. Keep the Prog_enable pins unchanged for at least
t
HVRST
after the High-voltage has been applied to ensure the Prog_enable signature
has been latched.
5. Shortly after latching the Prog_enable signature, the device will actively output data on
the Prog_enable[2]/SDO pin, and the resulting drive contention may increase the
power consumption. To minimize this drive contention, release the Prog_enable[2] pin
after t
HVRST
has elapsed.
6. Wait at least 50 µs before giving any serial instructions on SDI/SII.
21.8.2 Considerations for Efficient Programming
The loaded command and address are retained in the device during programming. For effi-
cient programming, the following should be considered.
• The command needs only be loaded once when writing or reading multiple memory
locations.
• Skip writing the data value 0xFF that is the contents of the entire EEPROM (unless the
EESAVE fuse is programmed) and flash after a chip erase.
• Address high byte only needs be loaded before programming or reading a new 256-word
window in flash or 256-byte EEPROM. This consideration also applies to reading signature
bytes.
Table 21-14. High-voltage Reset Characteristics
Supply Voltage RESET Pin High-voltage Threshold
Minimum High-voltage Period for
Latching Prog_enable
V
CC
V
HVRST
t
HVRST
4.5V 11.5V 100ns
5.5V 11.5V 100ns