Datasheet
122
7701F–AVR–10/12
Atmel ATtiny24/44/84 [Preliminary]
16. USI – Universal Serial Interface
16.1 Features
• Two-wire Synchronous Data Transfer (Master or Slave)
• Three-wire Synchronous Data Transfer (Master or Slave)
• Data Received Interrupt
• Wakeup from Idle Mode
• In Two-wire Mode: Wakeup from All Sleep Modes, Including Power-down Mode
• Two-wire Start Condition Detector with Interrupt Capability
16.2 Overview
The universal serial interface (USI) provides the basic hardware resources needed for serial
communication. Combined with a minimum of control software, the USI allows significantly
higher transfer rates and uses less code space than solutions based on software only. Inter-
rupts are included to minimize the processor load.
A simplified block diagram of the USI is shown in Figure 16-1 on page 122. For the actual
placement of I/O pins, refer to “Pinout Atmel
®
ATtiny24/44/84” on page 2. CPU accessible I/O
Registers, including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register
and bit locations are listed in the “Register Descriptions” on page 130.
Figure 16-1. Universal Serial Interface, Block Diagram
The 8-bit shift register is directly accessible via the data bus and contains the incoming and
outgoing data. The register has no buffering, so the data must be read as quickly as possible
to ensure that no data are lost. The most significant bit is connected to one of two output pins,
depending on the wire mode configuration. A transparent latch is inserted between the serial
register output and output pin, which delays the change of data output to the opposite clock
edge of the data input sampling. The serial input is always sampled from the data input (DI)
pin independent of the configuration.
DATA BUS
USIPF
USITC
USICLK
USICS0
USICS1
USIOIFUSIOIE
USIDC
USISIF
USIWM0
USIWM1
USISIE Bit7
Two-wire Clock
Control Unit
DO
(Output only)
DI/SDA
(Input/Open Drain)
USCK/SCL
(Input/Open Drain)
4-bit Counter
USIDR
USISR
DQ
LE
USICR
CLOCK
HOLD
TIM0 COMP
Bit0
[1]
3
0
1
2
3
0
1
2
0
1
2