Datasheet

117
7701F–AVR–10/12
Atmel ATtiny24/44/84 [Preliminary]
A FOC1A/FOC1B strobe will not generate any interrupt, nor will it clear the timer in clear timer
on compare match (CTC) mode using OCR1A as top. The FOC1A/FOC1B bits are always
read as zero.
• Bit 5..0 – Reserved Bit
This bit is reserved for future use. For ensuring compatibility with future devices, this bit must
be written to logical zero when the register is written.
14.11.4 TCNT1H and TCNT1L – Timer/Counter1
The two timer/counter I/O locations (TCNT1H and TCNT1L, combined TCNT1) give direct
access for both read and for write operations to the timer/counter unit's 16-bit counter. To
ensure that both the high and low bytes are read and written simultaneously when the CPU
accesses these registers, the access is performed using an 8-bit temporary high byte register
(TEMP). This temporary register is shared by all the other 16-bit registers. See “Accessing
16-bit Registers” on page 94.
Modifying the counter (TCNT1) while the counter is running introduces a risk of missing a
compare match between TCNT1 and one of the OCR1x registers.
Writing to the TCNT1 register blocks (removes) the compare match on the following timer
clock for all compare units.
14.11.5 OCR1AH and OCR1AL – Output Compare Register 1 A
14.11.6 OCR1BH and OCR1BL – Output Compare Register 1 B
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNT1). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC1x pin.
The output compare registers are 16 bits in size. To ensure that both the high and low bytes
are written simultaneously when the CPU writes to these registers, the access is performed
using an 8-bit temporary high byte register (TEMP). This temporary register is shared by all
the other 16-bit registers. See “Accessing 16-bit Registers” on page 94.
Bit 76543210
0x2D (0x4D) TCNT1[15:8] TCNT1H
0x2C (0x4C) TCNT1[7:0] TCNT1L
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
0x2B (0x4B) OCR1A[15:8] OCR1AH
0x2A (0x4A) OCR1A[7:0] OCR1AL
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
0x29 (0x49) OCR1B[15:8] OCR1BH
0x28 (0x48) OCR1B[7:0] OCR1BL
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0