Datasheet

114
7701F–AVR–10/12
Atmel ATtiny24/44/84 [Preliminary]
Table 14-3 shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the phase
correct or the phase and frequency correct, PWM mode.
Note: A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set. See
“Phase Correct PWM Mode” on page 107 for more details.
• Bit 1:0 – WGM11:0: Waveform Generation Mode
Combined with the WGM13:2 bits found in the TCCR1B Register, these bits control the count-
ing sequence of the counter, the source for maximum (TOP) counter value, and what type of
waveform generation is to be used, see Table 14-4 on page 115. Modes of operation sup-
ported by the Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare match
(CTC) mode, and three types of Pulse Width Modulation (PWM) modes (see “Modes of Oper-
ation” on page 103).
Table 14-3. Compare Output Mode, Phase Correct and Phase and Frequency Correct
PWM
(Note:)
COM1A1/COM1B1 COM1A0/COM1B0 Description
0 0 Normal port operation, OC1A/OC1B disconnected.
01
WGM13=0: Normal port operation, OC1A/OC1B
disconnected.
WGM13=1: Toggle OC1A on Compare Match, OC1B
reserved.
10
Clear OC1A/OC1B on Compare Match when
up-counting. Set OC1A/OC1B on Compare Match
when downcounting.
11
Set OC1A/OC1B on Compare Match when
up-counting. Clear OC1A/OC1B on Compare Match
when downcounting.