Datasheet

88
ATtiny828 [DATASHEET]
8371A–AVR–08/12
For actual placement of I/O pins, refer to Figure 1 on page 2 (MLF), and Figure 2 on page 2 (TQFP). Also, see
“TOCPMSA1 and TOCPMSA0 – Timer/Counter Output Compare Pin Mux Selection Registers” on page 127, and
“TOCPMCOE – Timer/Counter Output Compare Pin Mux Channel Output Enable” on page 128.
11.2.1 Registers
The Timer/Counter (TCNT0) and Output Compare Registers (OCR0A and OCR0B) are 8-bit registers. Interrupt request
(abbreviated to Int.Req. in Figure 26) signals are all visible in the Timer Interrupt Flag Register (TIFR). All interrupts are
individually masked with the Timer Interrupt Mask Register (TIMSK). TIFR and TIMSK are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on the T0 pin. The Clock
Select logic block controls which clock source and edge the Timer/Counter uses to increment (or decrement) its value.
The Timer/Counter is inactive when no clock source is selected. The output from the Clock Select logic is referred to as
the timer clock (clk
T0
).
The double buffered Output Compare Registers (OCR0A and OCR0B) is compared with the Timer/Counter value at all
times. The result of the compare can be used by the Waveform Generator to generate a PWM or variable frequency
output on the Output Compare pins (OC0A and OC0B). See “Output Compare Unit” on page 89 for details. The Compare
Match event will also set the Compare Flag (OCF0A or OCF0B) which can be used to generate an Output Compare
interrupt request.
11.2.2 Definitions
Many register and bit references in this section are written in general form. A lower case “n” replaces the Timer/Counter
number, in this case 0. A lower case “x” replaces the Output Compare Unit, in this case Compare Unit A or Compare Unit
B. However, when using the register or bit defines in a program, the precise form must be used, i.e., TCNT0 for
accessing Timer/Counter0 counter value and so on.
The definitions in Table 29 are also used extensively throughout the document.
Table 29. Definitions
11.3 Clock Sources
The Timer/Counter can be clocked by an internal or an external clock source. The clock source is selected by the Clock
Select logic which is controlled by the Clock Select (CS0[2:0]) bits located in the Timer/Counter Control Register
(TCCR0B). For details on clock sources and prescaler, see “Timer/Counter Prescaler” on page 131.
11.4 Counter Unit
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit. Figure 27 on page 89 shows a
block diagram of the counter and its surroundings.
Constant Description
BOTTOM The counter reaches BOTTOM when it becomes 0x00
MAX The counter reaches its MAXimum when it becomes 0xFF (decimal 255)
TOP
The counter reaches the TOP when it becomes equal to the highest value in the count
sequence. The TOP value can be assigned to be the fixed value 0xFF (MAX) or the
value stored in the OCR0A Register. The assignment depends on the mode of operation