Datasheet

54
ATtiny828 [DATASHEET]
8371A–AVR–08/12
To avoid unintentional changes to this bit, the following sequence must be followed:
1. Write the required signature to the CCP register. See page 14.
2. Within four instruction cycles, write the desired value to IVSEL.
9.3.2 PCMSK3 – Pin Change Mask Register 3
z Bits 7:4 – Res: Reserved Bits
These bits are reserved and will always read zero.
z Bits 3:0 – PCINT[27:24] : Pin Change Interrupt Mask Bits
Each PCINTn bit selects if the pin change interrupt of the corresponding I/O pin is enabled. Pin change interrupt on a pin
is enabled by setting the mask bit for the pin (PCINTn) and the corresponding group bit (PCIEn) in PCICR.
When this bit is cleared the pin change interrupt on the corresponding pin is disabled.
9.3.3 PCMSK2 – Pin Change Mask Register 2
z Bits 7:0 – PCINT[23:16] : Pin Change Interrupt Mask Bits
Each PCINTn bit selects if the pin change interrupt of the corresponding I/O pin is enabled. Pin change interrupt on a pin
is enabled by setting the mask bit for the pin (PCINTn) and the corresponding group bit (PCIEn) in PCICR.
When this bit is cleared the pin change interrupt on the corresponding pin is disabled.
9.3.4 PCMSK1 – Pin Change Mask Register 1
z Bits 7:0 – PCINT[15:8] : Pin Change Interrupt Mask Bits
Each PCINTn bit selects if the pin change interrupt of the corresponding I/O pin is enabled. Pin change interrupt on a pin
is enabled by setting the mask bit for the pin (PCINTn) and the corresponding group bit (PCIEn) in PCICR.
When this bit is cleared the pin change interrupt on the corresponding pin is disabled.
Bit 7 6 5 4 3 2 1 0
(0x73) PCINT27 PCINT26 PCINT25 PCINT24 PCMSK3
Read/Write R R R R R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
(0x6D) PCINT23 PCINT22 PCINT21 PCINT20 PCINT19 PCINT18 PCINT17 PCINT16 PCMSK2
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
(0x6C) PCINT15 PCINT14 PCINT13 PCINT12 PCINT11 PCINT10 PCINT9 PCINT8 PCMSK1
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0