Datasheet

53
ATtiny828 [DATASHEET]
8371A–AVR–08/12
Figure 20. Timing of pin change interrupts
9.3 Register Description
9.3.1 MCUCR – MCU Control Register
z Bits 7:2, 0 – Res: Reserved Bits
These bits are reserved and will always read zero.
z Bit 1 – IVSEL: Interrupt Vector Select
When this bit is cleared, interrupt vectors are placed at the start of Flash memory. When this bit is set, interrupt vectors
are moved to the beginning of the boot loader section.
The start address of the boot section is determined by the BOOTSZ Fuses. See “Configuring the Boot Loader” on page
216 for details.
If interrupt vectors are placed in the boot loader section and boot lock bit BLB02 is programmed, interrupts will be
disabled while executing from the application section.
If interrupt vectors are placed in the application section and boot lock bit BLB12 is programmed, interrupts will be
disabled while executing from the boot loader section.
clk
PCINT(0)
pin_lat
pin_sync
pcint_in_(0)
pcint_syn
pcint_setflag
PCIF
PCINT(0)
pin_sync
pcint_syn
pin_lat
D Q
LE
pcint_setflag
PCIF
clk
clk
PCINT(0) in PCMSK(x)
pcint_in_(0)
0
x
Bit 76543210
0x35 (0x55) ––––––IVSEL–MCUCR
Read/Write RRRRRRR/WR/W
Initial Value 0 0 0 0 0 0 0 0