Datasheet

45
ATtiny828 [DATASHEET]
8371A–AVR–08/12
Note: See “Code Examples” on page 7.
8.5 Register Description
8.5.1 MCUSR – MCU Status Register
The MCU Status Register provides information on which reset source caused an MCU Reset.
z Bits 7:4 – Res: Reserved Bits
These bits are reserved and will always read zero.
z Bit 3 – WDRF: Watchdog Reset Flag
This bit is set if a Watchdog Reset occurs. The bit is reset by a Power-on Reset, or by writing a logic zero to the flag.
z Bit 2 – BORF: Brown-out Reset Flag
This bit is set if a Brown-out Reset occurs. The bit is reset by a Power-on Reset, or by writing a logic zero to the flag.
z Bit 1 – EXTRF: External Reset Flag
This bit is set if an External Reset occurs. The bit is reset by a Power-on Reset, or by writing a logic zero to the flag.
z Bit 0 – PORF: Power-on Reset Flag
This bit is set if a Power-on Reset occurs. The bit is reset only by writing a logic zero to the flag.
Assembly Code Example
WDT_off:
wdr
; Clear WDRF in MCUSR
in r16, MCUSR
andi r16, ~(1<<WDRF)
out MCUSR, r16
; Write signature for change enable of protected I/O register
ldi r16, 0xD8
out CCP, r16
; Within four instruction cycles, turn off WDT
ldi r16, (0<<WDE)
out WDTCSR, r16
ret
Bit 76543210
0x35 (0x55) ––––WDRFBORFEXTRFPORFMCUSR
Read/Write R R R R R/W R/W R/W R/W
Initial Value 0000 See Bit Description