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ATtiny828 [DATASHEET]
8371A–AVR–08/12
8. System Control and Reset
8.1 Resetting the AVR
During reset, all I/O registers are set to their initial values, and the program starts execution from the Reset Vector. The
instruction placed at the Reset Vector must be a RJMP – Relative Jump – instruction to the reset handling routine. If the
program never enables an interrupt source, the interrupt vectors are not used, and regular program code can be placed
at these locations. This is also the case if the reset vector is in the application section while the interrupt vectors are in the
boot section, or vice versa.
The circuit diagram in Figure 13 shows the reset logic. Electrical parameters of the reset circuitry are defined in section
“System and Reset Characteristics” on page 250.
Figure 13. Reset Logic
The I/O ports of the AVR are immediately reset to their initial state when a reset source goes active. This does not require
any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal reset. This allows the power
to reach a stable level before normal operation starts.
8.2 Reset Sources
The ATtiny828 has four sources of reset:
z Power-on Reset. The MCU is reset when the supply voltage is below the Power-on Reset threshold (V
POT
)
z External Reset. The MCU is reset when a low level is present on the RESET pin for longer than the minimum pulse
length
z Watchdog Reset. The MCU is reset when the Watchdog Timer period expires and the Watchdog is enabled
z Brown Out Reset. The MCU is reset when the Brown-Out Detector is enabled and supply voltage is below the
brown-out threshold (V
BOT
)
8.2.1 Power-on Reset
A Power-on Reset (POR) pulse is generated by an on-chip detection circuit. The detection level is defined in section
“System and Reset Characteristics” on page 250. The POR is activated whenever V
CC
is below the detection level. The
POR circuit can be used to trigger the Start-up Reset, as well as to detect a failure in supply voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the Power-on Reset threshold
voltage invokes the delay counter, which determines how long the device is kept in reset after V
CC
rise. The reset signal
is activated again, without any delay, when V
CC
decreases below the detection level.