Datasheet

ATtiny828 [DATASHEET]

8371A–AVR–08/12

the ACD bit in ACSRA. See “ACSRA – Analog Comparator Control and Status Register” on page 134. This will reduce

power consumption in Idle mode.

If the ADC is enabled, a conversion starts automatically when this mode is entered.

7.1.2 ADC Noise Reduction Mode

This sleep mode halts clk

I/O

, clk

CPU

, and clk

FLASH

, while allowing other clocks to run. In ADC Noise Reduction mode, the

CPU is stopped but the following peripherals continue to operate:

z Watchdog (if enabled), and external interrupts

z ADC

z USART start frame detector, and TWI

This improves the noise environment for the ADC, enabling higher resolution measurements. If the ADC is enabled, a

conversion starts automatically when this mode is entered.

The following events can wake up the MCU:

z Watchdog reset, external reset, and brown-out reset

z External level interrupt on INT0, and pin change interrupt

z ADC conversion complete interrupt, and SPM/EEPROM ready interrupt

z USART start frame detection, and TWI slave address match

7.1.3 Power-Down Mode

This sleep mode halts all generated clocks, allowing operation of asynchronous modules, only. In Power-down Mode the

oscillator is stopped, while the following peripherals continue to operate:

z Watchdog (if enabled), external interrupts

The following events can wake up the MCU:

z Watchdog reset, external reset, and brown-out reset

z External level interrupt on INT0, and pin change interrupt

z USART start frame detection, and TWI slave address match

7.2 Power Reduction Register

The Power Reduction Register (PRR), see “PRR – Power Reduction Register” on page 37, provides a method to reduce

power consumption by stopping the clock to individual peripherals. When the clock for a peripheral is stopped then:

z The current state of the peripheral is frozen.

z The associated registers can not be read or written.

z Resources used by the peripheral will remain occupied.

The peripheral should in most cases be disabled before stopping the clock. Clearing the PRR bit wakes up the peripheral

and puts it in the same state as before shutdown.

Peripheral shutdown can be used in Idle mode and Active mode to significantly reduce the overall power consumption.

See “Current Consumption of Peripheral Units” on page 266 for examples. In all other sleep modes, the clock is already

stopped.

7.3 Minimizing Power Consumption

There are several issues to consider when trying to minimize the power consumption in an AVR controlled system. In

general, sleep modes should be used as much as possible, and the sleep mode should be selected so that as few as