Datasheet

34
ATtiny828 [DATASHEET]
8371A–AVR–08/12
7. Power Management and Sleep Modes
The high performance and industry leading code efficiency makes the AVR microcontrollers an ideal choise for low
power applications. In addition, sleep modes enable the application to shut down unused modules in the MCU, thereby
saving power. The AVR provides various sleep modes allowing the user to tailor the power consumption to the
application’s requirements.
7.1 Sleep Modes
Figure 11 on page 27 presents the different clock systems and their distribution in ATtiny828. The figure is helpful in
selecting an appropriate sleep mode. Table 9 shows the different sleep modes and the sources that may be used for
wake up.
Table 9. Active Clock Domains and Wake-up Sources in Different Sleep Modes
Note: 1. Start frame detection, only.
2. Address match interrupt, only.
3. For INT0 level interrupt, only.
To enter a sleep mode, the SE bit in MCUCR must be set and a SLEEP instruction must be executed. The SMn bits in
MCUCR select which sleep mode will be activated by the SLEEP instruction. See Table 10 on page 37 for a summary.
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU is then halted for four
cycles in addition to the start-up time, executes the interrupt routine, and resumes execution from the instruction
following SLEEP. The contents of the Register File and SRAM are unaltered when the device wakes up from sleep. If a
reset occurs during sleep mode, the MCU wakes up and executes from the Reset Vector.
Note that if a level triggered interrupt is used for wake-up the changed level must be held for some time to wake up the
MCU (and for the MCU to enter the interrupt service routine). See “External Interrupts” on page 51 for details.
7.1.1 Idle Mode
This sleep mode basically halts clk
CPU
and clk
FLASH
, while allowing other clocks to run. In Idle Mode, the CPU is stopped
but the following peripherals continue to operate:
z Watchdog and interrupt system
z Analog comparator, and ADC
z USART, TWI, and timer/counters
Idle mode allows the MCU to wake up from external triggered interrupts as well as internal ones, such as Timer Overflow.
If wake-up from the analog comparator interrupt is not required, the analog comparator can be powered down by setting
Sleep Mode
Oscillators Active Clock Domains Wake-up Sources
Main Clock Source Enabled clk
CPU
clk
FLASH
clk
IO
clk
ADC
Watchdog Interrupt INT0 and Pin Change SPM/EEPROM Ready Interrupt ADC Interrupt USART
(1)
TWI Slave Other I/O
Idle X X X X X X X X X X
ADC Noise Reduction X X X X
(3)
X X X X
(2)
Power-down X X
(3)
X X
(2)