Datasheet

255
ATtiny828 [DATASHEET]
8371A–AVR–08/12
Figure 105. Parallel Programming Timing, Loading Sequence with Timing Requirements
(1)
Note: 1. The timing requirements shown in Figure 104 (i.e., t
DVXH
, t
XHXL
, and t
XLDX
) also apply to loading operation.
Figure 106. Parallel Programming Timing, Reading Sequence (within the Same Page) with Timing Requirements
(1)
Note: 1. The timing requirements shown in Figure 104 (i.e., t
DVXH
, t
XHXL
, and t
XLDX
) also apply to reading operation.
CLKI
PAGEL
t
PLXH
XLXH
t
t
XLPH
z
ADDR0 (Low Byte) DATA (Low Byte) DATA (High Byte) ADDR1 (Low Byte)
DATA
BS1
XA0
XA1
LOAD ADDRESS
(LOW BYTE)
LOAD DATA
(LOW BYTE)
LOAD DATA
(HIGH BYTE)
LOAD DATA
LOAD ADDRESS
(LOW BYTE)
CLKI
OE
ADDR0 (Low Byte) DATA (Low Byte)
DATA (High Byte)
ADDR1 (Low Byte)
DATA
BS1
XA0
XA1
LOAD ADDRESS
(LOW BYTE)
READ DATA
(LOW BYTE)
READ DATA
(HIGH BYTE)
LOAD ADDRESS
(LOW BYTE)
t
BVDV
t
OLDV
t
XLOL
t
OHDZ