Datasheet

240
ATtiny828 [DATASHEET]
8371A–AVR–08/12
Figure 97. Fuses Programming Waveforms
23.2.11 Programming the Lock Bits
The algorithm for programming the lock bits is as follows (see “Programming the Flash” on page 235 for details on
command and data loading):
z A: Load command “0010 0000”
z C: Load data low byte. Bit n = “0” programs the Lock bit. If LB1 and LB2 have been programmed, it is not possible
to program the Lock Bits by any External Programming mode
z Give WR a negative pulse and wait for RDY/BSY to go high
Lock bits can only be cleared by executing Chip Erase.
23.2.12 Reading Fuse and Lock Bits
The algorithm for reading fuse and lock bits is as follows (see “Programming the Flash” on page 235 for details on
command loading):
z A: Load command “0000 0100”
z Set OE to “0”, BS2 to “0” and BS1 to “0”. Low fuse bits can now be read at DATA (“0” means programmed)
z Set OE to “0”, BS2 to “1” and BS1 to “1”. High fuse bits can now be read at DATA (“0” means programmed)
z Set OE to “0”, BS2 to “1”, and BS1 to “0”. Extended fuse bits can now be read at DATA (“0” means programmed)
z Set OE to “0”, BS2 to “0” and BS1 to “1”. Lock bits can now be read at DATA (“0” means programmed)
z Set OE to “1”
Fuse and lock bit mapping is illustrated in Figure 98, below.
RDY/BSY
WR
OE
RESET +12V
PAGEL
0x40
DATA
DATA XX
XA1
XA0
BS1
XTAL1
AC
0x40 DATA XX
AC
Write Fuse Low byte Write Fuse high byte
0x40 DATA XX
AC
Write Extended Fuse byte
BS2