Datasheet

224
ATtiny828 [DATASHEET]
8371A–AVR–08/12
z Bit 3 – RWFLB: Read/Write Fuse and Lock Bits
An LPM instruction within three cycles after RWFLB and SPMEN bits are set will read either the lock bits or fuse bits
(depending on Z0 in the Z-pointer) into the destination register. See “Reading Lock, Fuse and Signature Data from
Software” on page 229 for details.
If this bit is written to one at the same time as SPMEN, the next SPM instruction within four clock cycles sets boot lock
bits and memory lock bits, according to the data in R0. The data in R1 and the address in the Z-pointer are ignored. This
bit is automatically cleared when lock bits have been set, or if no SPM instruction is executed within four clock cycles.
z Bit 2 – PGWRT: Page Write
If this bit is written to one at the same time as SPMEN, the next SPM instruction within four clock cycles executes Page
Write, with the data stored in the temporary buffer. The page address is taken from the high part of the Z-pointer. The
data in R1 and R0 are ignored. The PGWRT bit will auto-clear upon completion of a Page Write, or if no SPM instruction
is executed within four clock cycles. The CPU is halted during the entire Page Write operation.
z Bit 1 – PGERS: Page Erase
If this bit is written to one at the same time as SPMEN, the next SPM instruction within four clock cycles executes Page
Erase. The page address is taken from the high part of the Z-pointer. The data in R1 and R0 are ignored. The PGERS bit
will auto-clear upon completion of a Page Erase, or if no SPM instruction is executed within four clock cycles. The CPU is
halted during the entire Page Write operation.
z Bit 0 – SPMEN: Store Program Memory Enable
This bit enables the SPM instruction for the next four clock cycles. If set to one together with RSIG, CTPB, RWFLB,
PGWRT or PGERS, the following LPM/SPM instruction will have a special meaning, as described elsewhere.
If only SPMEN is written, the following SPM instruction will store the value in R1:R0 in the temporary page buffer
addressed by the Z-pointer. The LSB of the Z-pointer is ignored. The SPMEN bit will auto-clear upon completion of an
SPM instruction, or if no SPM instruction is executed within four clock cycles. During Page Erase and Page Write, the
SPMEN bit remains high until the operation is completed.