Datasheet

222
ATtiny828 [DATASHEET]
8371A–AVR–08/12
21.8.5 SPM Interrupt
If the SPM interrupt is enabled, it will generate a constant interrupt when the SPMEN bit in SPMCSR is cleared. This
means that the interrupt can be used instead of polling the SPMCSR.
When using the SPM interrupt, the interrupt vectors should be moved to the boot loader section to avoid that an interrupt
is accessing the RWW section when blocked for reading. Moving the interrupts is described in section “Interrupts” on
page 48.
21.8.6 SPMCSR Can Not Be Written When EEPROM is Being Programmed
Note that an EEPROM write operation will block all software programming to Flash. Reading fuses and lock bits from
software will also be prevented during the EEPROM write operation. It is recommended that the user checks the status
bit (EEPE) in EECR and verifies that it is cleared before writing to SPMCSR.
21.8.7 RWW Section Can Not Be Read During Self-Programming
During self-programming (Page Erase or Page Write), the RWW section is always blocked for reading and the software
should therefore prevent this section from being addressed during the operation. The RWWSB in the SPMCSR is set as
long as the RWW section is busy.
During self-programming the interrupt vector table should be moved to the BLS. See IVSEL bit of “MCUCR – MCU
Control Register” on page 53. Alternatively, interrupts should be disabled.
After programming is complete, but before addressing the RWW section, the user software must clear RWWSB by
writing the RWWSRE bit.
21.9 Preventing Flash Corruption
During periods of low V
CC
, the Flash program can be corrupted because the supply voltage is too low for the CPU and
the Flash to operate properly. These issues are the same as for board level systems using the Flash, and the same
design solutions should be applied.
A Flash program corruption can be caused by two situations when the voltage is too low. First, a regular write sequence
to the Flash requires a minimum voltage to operate correctly. Secondly, the CPU itself can execute instructions
incorrectly, if the supply voltage for executing instructions is too low.
Flash corruption can easily be avoided by following these design recommendations (one is sufficient):
1. Keep the AVR RESET active (low) during periods of insufficient power supply voltage. This can be done by
enabling the internal Brown-out Detector (BOD) if the operating voltage matches the detection level. If not, an
external low V
CC
reset protection circuit can be used. If a reset occurs while a write operation is in progress, the
write operation will be completed provided that the power supply voltage is sufficient.
2. Keep the AVR core in Power-down sleep mode during periods of low V
CC
. This will prevent the CPU from attempt-
ing to decode and execute instructions, effectively protecting the SPMCSR Register and thus the Flash from
unintentional writes.
3. If there is no need for a boot loader, the boot loader lock bits should be programmed to prevent software updates