Datasheet

ATtiny828 [DATASHEET]

8371A–AVR–08/12

5.2.3 Extended I/O Register File

Following the standard I/O register file, the next 160 locations are reserved for extended I/O registers. ATtiny828 is a

complex microcontroller with more peripheral units than can be addressed with the IN and OUT instructions. Registers in

the extended I/O area must be accessed using instructions LD/LDD/LDI/LDS and ST/STD/STS. See “Instruction Set

Summary” on page 301.

See “Register Summary” on page 297 for a list of I/O registers.

5.2.4 Data Memory (SRAM)

Following the general purpose register file and the I/O register files, the remaining 512 locations are reserved for the

internal data SRAM.

There are five addressing modes available:

z Direct. This mode of addressing reaches the entire data space.

z Indirect.

z Indirect with Displacement. This mode of addressing reaches 63 address locations from the base address given by

the Y- or Z-register.

z Indirect with Pre-decrement. In this mode the address register is automatically decremented before access.

Address pointer registers (X, Y, and Z) are located in the general purpose register file, in registers R26 to R31. See

“General Purpose Register File” on page 9.

z Indirect with Post-increment. In this mode the address register is automatically incremented after access. Address

pointer registers (X, Y, and Z) are located in the general purpose register file, in registers R26 to R31. See

“General Purpose Register File” on page 9.

All addressing modes can be used on the entire volatile memory, including the general purpose register file, the I/O

Internal SRAM is accessed in two clk

CPU

cycles, as illustrated in Figure 10, below.

Figure 10. On-chip Data SRAM Access Cycles

clk

Data

Address

Address valid

T1 T2 T3

Compute Address

Read

Write

CPU

Memory Access Instruction

Next Instruction