Datasheet

125
ATtiny828 [DATASHEET]
8371A–AVR–08/12
z Bits 1:0 – WGM1[1:0]: Waveform Generation Mode
Combined with the WGM1[3:2] bits found in the TCCR1B Register, these bits control the counting sequence of the
counter, the source for maximum (TOP) counter value, and what type of waveform generation to be used, see Table 42.
Modes of operation supported by the Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare match
(CTC) mode, and three types of Pulse Width Modulation (PWM) modes. (“Modes of Operation” on page 111).
Table 42. Waveform Generation Modes
12.11.2 TCCR1B – Timer/Counter1 Control Register B
z Bit 7 – ICNC1: Input Capture Noise Canceler
Setting this bit (to one) activates the Input Capture Noise Canceler. When the noise canceler is activated, the input from
the Input Capture pin (ICP1) is filtered. The filter function requires four successive equal valued samples of the ICP1 pin
for changing its output. The Input Capture is therefore delayed by four Oscillator cycles when the noise canceler is
enabled.
Mode
WGM1[3
:0]
Mode of
Operation TOP
Update of
OCR1x at
TOV1 Flag Set
on
0 0000 Normal 0xFFFF Immediate MAX
1 0001 PWM, Phase Correct, 8-bit 0x00FF TOP BOTTOM
2 0010 PWM, Phase Correct, 9-bit 0x01FF TOP BOTTOM
3 0011 PWM, Phase Correct, 10-bit 0x03FF TOP BOTTOM
4 0100 CTC (Clear Timer on Compare) OCR1A Immediate MAX
5 0101 Fast PWM, 8-bit 0x00FF TOP TOP
6 0110 Fast PWM, 9-bit 0x01FF TOP TOP
7 0111 Fast PWM, 10-bit 0x03FF TOP TOP
8 1000 PWM, Phase & Freq. Correct ICR1 BOTTOM BOTTOM
9 1001 PWM, Phase & Freq. Correct OCR1A BOTTOM BOTTOM
10 1010 PWM, Phase Correct ICR1 TOP BOTTOM
11 1011 PWM, Phase Correct OCR1A TOP BOTTOM
12 1100 CTC (Clear Timer on Compare) ICR1 Immediate MAX
13 1101 (Reserved) – – –
14 1110 Fast PWM ICR1 TOP TOP
15 1111 Fast PWM OCR1A TOP TOP
Bit 7 6 5 4 3 2 1 0
(0x81) ICNC1 ICES1 – WGM13 WGM12 CS12 CS11 CS10 TCCR1B
Read/Write R/W R/W R R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0