Datasheet

123
ATtiny828 [DATASHEET]
8371A–AVR–08/12
Note: See “Code Examples” on page 7.
The assembly code example requires that the r17:r16 register pair contains the value to be written to TCNT1.
12.10.1 Reusing the Temporary High Byte Register
If writing to more than one 16-bit register where the high byte is the same for all registers written, then the high byte only
needs to be written once. However, note that the same rule of atomic operation described previously also applies in this
case.
12.11 Register Description
12.11.1 TCCR1A – Timer/Counter1 Control Register A
z Bits 7:6 – COM1A[1:0] : Compare Output Mode for Channel A
z Bits 5:4 – COM1B[1:0] : Compare Output Mode for Channel B
The COM1A[1:0] and COM1B[1:0] control the Output Compare pins (OC1A and OC1B respectively) behavior. If one or
both of the COM1A[1:0] bits are written to one, the OC1A output overrides the normal port functionality of the I/O pin it is
connected to. If one or both of the COM1B[1:0] bit are written to one, the OC1B output overrides the normal port
functionality of the I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit corresponding to
the OC1A or OC1B pin must be set in order to enable the output driver.
When the OC1A or OC1B is connected to the pin, the function of the COM1x[1:0] bits is dependent of the WGM1[3:0] bits
setting.
Table 39 shows COM1x[1:0] bit functionality when WGM1[3:0] bits are set to a Normal or a CTC mode (non-PWM).
C Code Example
void TIM16_WriteTCNT1( unsigned int i )
{
unsigned char sreg;
unsigned int i;
/* Save global interrupt flag */
sreg = SREG;
/* Disable interrupts */
_CLI();
/* Set TCNT1 to i */
TCNT1 = i;
/* Restore global interrupt flag */
SREG = sreg;
}
Bit 76543210
(0x80) COM1A1 COM1A0 COM1B1 COM1B0 – – WGM11 WGM10 TCCR1A
Read/Write R/W R/W R/W R/W R R R/W R/W
Initial Value 00000000