Datasheet

84
8197C–AVR–05/11
ATtiny261A/461A/861A
11.10.2 TCCR0B – Timer/Counter0 Control Register B
• Bit 4 – TSM: Timer/Counter Synchronization Mode
Writing the TSM bit to one activates the Timer/Counter Synchronization mode. In this mode, the
value that is written to the PSR0 bit is kept, hence keeping the Prescaler Reset signal asserted.
This ensures that the Timer/Counter is halted and can be configured without the risk of advanc-
ing during configuration. When the TSM bit is written to zero, the PSR0 bit is cleared by
hardware, and the Timer/Counter start counting.
• Bit 3 – PSR0: Prescaler Reset Timer/Counter0
When this bit is one, the Timer/Counter0 prescaler will be Reset. This bit is normally cleared
immediately by hardware, except if the TSM bit is set.
• Bits 2:0 – CS0[2:0]: Clock Select0, Bits 2 - 0
The Clock Select0 bits 2, 1, and 0 define the prescaling source of Timer0.
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
11.10.3 TCNT0L – Timer/Counter0 Register Low Byte
The Timer/Counter0 Register Low Byte, TCNT0L, gives direct access, both for read and write
operations, to the Timer/Counter unit 8-bit counter. Writing to the TCNT0L Register blocks (dis-
ables) the Compare Match on the following timer clock. Modifying the counter (TCNT0L) while
the counter is running, introduces a risk of missing a Compare Match between TCNT0L and the
OCR0x Registers. In 16-bit mode the TCNT0L register contains the lower part of the 16-bit
Timer/Counter0 Register.
Bit 76543210
0x33 (0x53)
– – – TSM PSR0 CS02 CS01 CS01 TCCR0B
Read/Write R R R R/W R/W R/W R/W R/W
Initial Value00000000
Table 11-4. Clock Select Bit Description
CS02 CS01 CS00 Description
0 0 0 No clock source (Timer/Counter stopped)
001clk
I/O
/(No prescaling)
010clk
I/O
/8 (From prescaler)
011clk
I/O
/64 (From prescaler)
100clk
I/O
/256 (From prescaler)
101clk
I/O
/1024 (From prescaler)
1 1 0 External clock source on T0 pin. Clock on falling edge.
1 1 1 External clock source on T0 pin. Clock on rising edge.
Bit 76543210
0x32 (0x52) TCNT0L[7:0] TCNT0L
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000