Datasheet

67
8197C–AVR–05/11
ATtiny261A/461A/861A
• Port B, Bit 1 – MISO/DO/OC1A/PCINT9
• DO: Three-wire mode Universal Serial Interface Data output. Three-wire mode Data output
overrides PORTB1 value and it is driven to the port when data direction bit DDB1 is set (one).
PORTB1 still enables the pull-up, if the direction is input and PORTB1 is set (one).
• OC1A: Output Compare Match output: The PB1 pin can serve as an external output for the
Timer/Counter1 Compare Match B when configured as an output (DDB1 set). The OC1A pin
is also the output pin for the PWM mode timer function.
• PCINT9: Pin Change Interrupt source 9.
• Port B, Bit 0 – MOSI/DI/SDA/OC1A
/PCINT8
• DI: Data Input in USI Three-wire mode. USI Three-wire mode does not override normal port
functions, so pin must be configure as an input for DI function.
• SDA: Two-wire mode Serial Interface Data.
•OC1A
: Inverted Output Compare Match output: The PB0 pin can serve as an external output
for the Timer/Counter1 Compare Match B when configured as an output (DDB0 set). The
OC1A
pin is also the inverted output pin for the PWM mode timer function.
• PCINT8: Pin Change Interrupt source 8.
Table 10-7 and Table 10-8 relate the alternate functions of Port B to the overriding signals
shown in Figure 10-5 on page 60.
Note: 1. “1” when the Fuse is “0” (Programmed).
Table 10-7. Overriding Signals for Alternate Functions in PB[7:4]
Signal
Name
PB7/RESET/
dW/ADC10/
PCINT15
PB6/ADC9/T0/
INT0/PCINT14
PB5/XTAL2/CLKO/
OC1D/ADC8/
PCINT13
(1)
PB4/XTAL1/
OC1D
/ADC7/
PCINT12
(1)
PUOE
RSTDISBL
(1)
•
DWEN
(1)
0 INTRC • EXTCLK INTRC
PUOV1000
DDOE
RSTDISBL
(1)
•
DWEN
(1)
0 INTRC • EXTCLK INTRC
DDOV debugWire Transmit 0 0 0
PVOE 0 0 OC1D Enable OC1D Enable
PVOV 0 0 OC1D OC1D
PTOE0000
DIEOE 0
RSTDISBL
+
(PCINT14 • PCIE +
ADC9D)
INTRC • EXTCLK +
PCINT13 • PCIE +
ADC8D
INTRC
+ PCINT12 •
PCIE + ADC7D
DIEOV ADC10D ADC9D
(INTRC • EXTCLK) +
ADC8D
INTRC • ADC7D
DI PCINT15 T0/INT0/PCINT14 PCINT13 PCINT12
AIO RESET / ADC10 ADC9 XTAL2, ADC8 XTAL1, ADC7