Datasheet

148
8197C–AVR–05/11
ATtiny261A/461A/861A
selection. Since the next conversion has already started automatically, the next result will reflect
the previous channel selection. Subsequent conversions will reflect the new channel selection.
15.6.2 ADC Voltage Reference
The conversion range of the ADC is defined by the voltage reference (V
REF
). Single ended chan-
nels that exceed V
REF
will result in codes close to 0x3FF. V
REF
can be selected as either V
CC
, or
internal 1.1V / 2.56V voltage reference, or external AREF pin. The first conversion result after
switching voltage reference source may be inaccurate, and the user is advised to discard this
result.
15.7 ADC Noise Canceler
The ADC features a noise canceler that enables conversion during sleep mode. This reduces
noise induced from the CPU core and other I/O peripherals. The noise canceler can be used
with ADC Noise Reduction and Idle mode. To make use of this feature, the following procedure
should be used:
• Make sure that the ADC is enabled and is not busy converting. Single Conversion mode must
be selected and the ADC conversion complete interrupt must be enabled.
• Enter ADC Noise Reduction mode (or Idle mode). The ADC will start a conversion once the
CPU has been halted.
• If no other interrupts occur before the ADC conversion completes, the ADC interrupt will wake
up the CPU and execute the ADC Conversion Complete interrupt routine. If another interrupt
wakes up the CPU before the ADC conversion is complete, it will be executed, and an ADC
Conversion Complete interrupt request will be generated when the ADC conversion
completes. The CPU will remain in active mode until a new sleep command is executed.
Note that the ADC will not automatically be turned off when entering other sleep modes than Idle
mode and ADC Noise Reduction mode. The user is advised to write zero to ADEN before enter-
ing such sleep modes to avoid excessive power consumption.
15.8 Analog Input Circuitry
The analog input circuitry for single ended channels is illustrated in Figure 15-8 An analog
source applied to ADCn is subjected to the pin capacitance and input leakage of that pin, regard-
less of whether that channel is selected as input for the ADC. When the channel is selected, the
source must drive the S/H capacitor through the series resistance (combined resistance in the
input path).