Datasheet

111
8197C–AVR–05/11
ATtiny261A/461A/861A
12.12 Register Description
12.12.1 TCCR1A – Timer/Counter1 Control Register A
• Bits 7:6 – COM1A[1:0]: Comparator A Output Mode, Bits 1 and 0
These bits control the behaviour of the Waveform Output (OCW1A) and the connection of the
Output Compare pin (OC1A). If one or both of the COM1A[1:0] bits are set, the OC1A output
overrides the normal port functionality of the I/O pin it is connected to. The complementary
OC1B
output is connected only in PWM modes when the COM1A[1:0] bits are set to “01”. Note
that the Data Direction Register (DDR) bit corresponding to the OC1A and OC1A
pins must be
set in order to enable the output driver.
The function of the COM1A[1:0] bits depends on the PWM1A, WGM10 and WGM11 bit settings.
Table 12-8 shows the COM1A[1:0] bit functionality when the PWM1A bit is set to Normal Mode
(non-PWM).
Table 12-9 shows the COM1A[1:0] bit functionality when the PWM1A, WGM10 and WGM11 bits
are set to fast PWM mode.
Bit 76543210
0x30 (0x50) COM1A1 COM1A0 COM1B1 COM1B0 FOC1A FOC1B PWM1A PWM1B TCCR1A
Read/Write R/W R/W R/W R/W W W R/W R/W
Initial value00000000
Table 12-8. Compare Output Mode, Normal Mode (non-PWM)
COM1A[1:0] OCW1A Behaviour OC1A Pin OC1A Pin
00 Normal port operation. Disconnected Disconnected
01 Toggle on Compare Match. Connected Disconnected
10 Clear on Compare Match. Connected Disconnected
11 Set on Compare Match. Connected Disconnected
Table 12-9. Compare Output Mode, Fast PWM Mode
COM1A[1:0] OCW1A Behaviour OC1A OC1A
00 Normal port operation. Disconnected Disconnected
01
Cleared on Compare Match.
Set when TCNT1 = 0x000.
Connected Connected
10
Cleared on Compare Match.
Set when TCNT1 = 0x000.
Connected Disconnected
11
Set on Compare Match
Cleared when TCNT1 = 0x000.
Connected Disconnected