Datasheet
40
2586D–AVR–02/06
ATtiny25/45/85
Figure 9-6. Watchdog Reset During Operation
9.0.7 MCUSR – MCU Status Register
The MCU Status Register provides information on which reset source caused an MCU Reset.
• Bits 7..4 – Res: Reserved Bits
These bits are reserved bits in the ATtiny25/45/85 and will always read as zero.
• Bit 3 – WDRF: Watchdog Reset Flag
This bit is set if a Watchdog Reset occurs. The bit is reset by a Power-on Reset, or by writing a
logic zero to the flag.
• Bit 2 – BORF: Brown-out Reset Flag
This bit is set if a Brown-out Reset occurs. The bit is reset by a Power-on Reset, or by writing a
logic zero to the flag.
• Bit 1 – EXTRF: External Reset Flag
This bit is set if an External Reset occurs. The bit is reset by a Power-on Reset, or by writing a
logic zero to the flag.
• Bit 0 – PORF: Power-on Reset Flag
This bit is set if a Power-on Reset occurs. The bit is reset only by writing a logic zero to the flag.
To make use of the Reset Flags to identify a reset condition, the user should read and then reset
the MCUSR as early as possible in the program. If the register is cleared before another reset
occurs, the source of the reset can be found by examining the Reset Flags.
9.1 Internal Voltage Reference
ATtiny25/45/85 features an internal bandgap reference. This reference is used for Brown-out
Detection, and it can be used as an input to the Analog Comparator or the ADC.
CK
CC
Bit 76543210
0x34 – – – – WDRF BORF EXTRF PORF MCUSR
Read/Write R R R R R/W R/W R/W R/W
Initial Value 0 0 0 0 See Bit Description