Datasheet

37
2586D–AVR–02/06
ATtiny25/45/85
Notes: 1. Values are guidelines only. Actual values are TBD.
2. The Power-on Reset will not work unless the supply voltage has been below V
POT
(falling)
9.0.3 Power-on Reset
A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection level
is defined in Table 9-1. The POR is activated whenever V
CC
is below the detection level. The
POR circuit can be used to trigger the Start-up Reset, as well as to detect a failure in supply
voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the
Power-on Reset threshold voltage invokes the delay counter, which determines how long the
device is kept in RESET after V
CC
rise. The RESET signal is activated again, without any delay,
when V
CC
decreases below the detection level.
Figure 9-2. MCU Start-up, RESET
Tied to V
CC
Table 9-1. Reset Characteristics
(1)
Symbol Parameter Condition Min Typ Max Units
V
POT
Power-on Reset Threshold
Voltage (rising)
T
A
= -40 - 85°C 0.7 1.0 1.4 V
Power-on Reset Threshold
Voltage (falling)
(2)
T
A
= -40 - 85°C 0.6 0.9 1.3 V
V
RST
RESET Pin Threshold
Voltage
V
CC
= 3V 0.2 V
CC
0.9 V
CC
V
t
RST
Minimum pulse width on
RESET Pin
V
CC
= 3V 2.5 µs
V
RESET
TIME-OUT
I
NTERNAL
RESET
t
TOUT
V
POT
V
RST
CC