Datasheet

32
2586D–AVR–02/06
ATtiny25/45/85
8. Power Management and Sleep Modes
The high performance and industry leading code efficiency makes the AVR microcontrollers an
ideal choise for low power applications.
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
To enter any of the three sleep modes, the SE bit in MCUCR must be written to logic one and a
SLEEP instruction must be executed. The SM1:0 bits in the MCUCR Register select which sleep
mode (Idle, ADC Noise Reduction or Power-down) will be activated by the SLEEP instruction.
See Table 8-1 for a summary. If an enabled interrupt occurs while the MCU is in a sleep mode,
the MCU wakes up. The MCU is then halted for four cycles in addition to the start-up time, exe-
cutes the interrupt routine, and resumes execution from the instruction following SLEEP. The
contents of the Register File and SRAM are unaltered when the device wakes up from sleep. If a
reset occurs during sleep mode, the MCU wakes up and executes from the Reset Vector.
Figure 7-1 on page 22 presents the different clock systems in the ATtiny25/45/85, and their dis-
tribution. The figure is helpful in selecting an appropriate sleep mode.
8.0.1 MCUCR – MCU Control Register
The MCU Control Register contains control bits for power management.
• Bit 5 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
• Bits 4, 3 – SM1:0: Sleep Mode Select Bits 2..0
These bits select between the three available sleep modes as shown in Table 8-1.
• Bit 2 – Res: Reserved Bit
This bit is a reserv ed bit in the ATtiny25/45/85 and will always read as zero.
Bit 76543210
0x35
– PUD SE SM1 SM0 — ISC01 ISC00 MCUCR
Read/Write R R/W R/W R/W R/W R R/W R/W
Initial Value00000000
Table 8-1. Sleep Mode Select
SM1 SM0 Sleep Mode
00Idle
0 1 ADC Noise Reduction
1 0 Power-down
11Reserved