Datasheet

23
2586D–AVR–02/06
ATtiny25/45/85
7.1.5 Internal PLL for Fast Peripheral Clock Generation - clk
PCK
The internal PLL in ATtiny25/45/85 generates a clock frequency that is 8x multiplied from a
source input. The source of the PLL input clock is the output of the internal RC oscillator having
a frequency of 8.0 MHz. Thus the output of the PLL, the fast peripheral clock is 64 MHz. The fast
peripheral clock, or a clock prescaled from that, can be selected as the clock source for
Timer/Counter1. See the Figure 7-2 on page 23.
Since the ATtiny25/45/85 device is a migration path for ATtiny15, there is an ATtiny15 compati-
bility mode for supporting the backward compatibility with ATtiny15. The ATtiny15 compatibility
mode is selected by programming the CKSEL fuses to ‘0011’. In the ATtiny15 compatibility
mode the frequency of the internal RC oscillator is calibrated down to 6.4 MHz and the multipli-
cation factor of the PLL is set to 4x. With these adjustments the clocking system is ATtiny15
compatible and the resulting fast peripheral clock has a frequency of 25.6 MHz (same as in
ATtiny15).
The PLL is locked on the RC oscillator and adjusting the RC oscillator via OSCCAL register will
adjust the fast peripheral clock at the same time. However, even if the RC oscillator is taken to a
higher frequency than 8 MHz, the fast peripheral clock frequency saturates at 85 MHz (worst
case) and remains oscillating at the maximum frequency. It should be noted that the PLL in this
case is not locked any longer with the RC oscillator clock.
Therefore, it is recommended not to take the OSCCAL adjustments to a higher frequency than 8
MHz in order to keep the PLL in the correct operating range. The internal PLL is enabled only
when the PLLE bit in the register PLLCSR is set or the PLLCK fuse is programmed (‘0’). The bit
PLOCK from the register PLLCSR is set when PLL is locked.
Both internal RC oscillator and PLL are switched off in power down and stand-by sleep modes.
Figure 7-2. PCK Clocking System
8.0 MHz / 6.4 MHz
RC OSCILLATOR
OSCCAL
XTAL1
XTAL2
OSCILLATORS
DIVIDE
BY 4
SYSTEM
CLOCK
PLL
8x / 4x
PLLCK & CKSEL FUSES
PLLE
PCK
Lock
Detector
PLOCK
64 / 25.6 MHz
System
Clock
Prescaler
CLKPS3..0