Datasheet

123
2586D–AVR–02/06
ATtiny25/45/85
19-2. If ACME is cleared or ADEN is set, AIN1 is applied to the negative input to the Analog
Comparator.
19.1.1 DIDR0 – Digital Input Disable Register 0
• Bits 1, 0 – AIN1D, AIN0D: AIN1, AIN0 Digital Input Disable
When this bit is written logic one, the digital input buffer on the AIN1/0 pin is disabled. The corre-
sponding PIN Register bit will always read as zero when this bit is set. When an analog signal is
applied to the AIN1/0 pin and the digital input from this pin is not needed, this bit should be writ-
ten logic one to reduce power consumption in the digital input buffer.
Table 19-2. Analog Comparator Multiplexed Input
ACME ADEN MUX1..0 Analog Comparator Negative Input
0x xxAIN1
11 xxAIN1
10 00ADC0
10 01ADC1
10 10ADC2
10 11ADC3
Bit 76543210
0x14
– – ADC0D ADC2D ADC3D ADC1D AIN1D AIN0D DIDR0
Read/Write R R R/W R/W R/W R/W R/W R/W
Initial Value00000000