Datasheet

104
2586D–AVR–02/06
ATtiny25/45/85
When OCR1A contains $00 or the top value, as specified in OCR1C register, the output
PB1(OC1A) is held low or high according to the settings of COM1A1/COM1A0. This is shown in
Table 16-4.
In PWM mode, the Timer Overflow Flag - TOV1 is set when the TCNT1 counts to the OCR1C
value and the TCNT1 is reset to $00. The Timer Overflow Interrupt1 is executed when TOV1 is
set provided that Timer Overflow Interrupt and global interrupts are enabled. This also applies to
the Timer Output Compare flags and interrupts.
The frequency of the PWM will be Timer Clock 1 Frequency divided by (OCR1C value + 1). See
the following equation:
Resolution shows how many bit is required to express the value in the OCR1C register. It is cal-
culated by following equation
Resolution
PWM
= log
2
(OCR1C + 1).
Table 16-4. PWM Outputs OCR1A = $00 or OCR1C
COM1A1 COM1A0 OCR1A Output OC1A
01$00L
0 1 OCR1C H
10$00L
1 0 OCR1C H
11$00H
1 1 OCR1C L
f
PWM
f
TCK1
OCR1C + 1()
----------------------------------- -=