Datasheet
6
ATtiny40 [SUMMARY DATASHEET]
8263BS–AVR–01/2013
5. Register Summary
Note: 1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page
0x3F SREG I T H S V N Z C Page 12
0x3E SPH Stack Pointer High Byte Page 12
0x3D SPL Stack Pointer Low Byte Page 12
0x3C CCP CPU Change Protection Register Page 11
0x3B RSTFLR – – – – WDRF BORF EXTRF PORF Page 35
0x3A MCUCR ISC01 ISC00 – BODS SM2 SM1 SM0 SE Pages 26, 38
0x39 OSCCAL Oscillator Calibration Register Page 23
0x38 Reserved –
0x37 CLKMSR – – – – – – CLKMS1 CLKMS0 Page 21
0x36 CLKPSR – – – – CLKPS3 CLKPS2 CLKPS1 CLKPS0 Page 22
0x35 PRR – – – PRTWI PRSPI PRTIM1 PRTIM0 PRADC Page 27
0x34
QTCSR QTouch Control and Status Register
Page 5
0x33 NVMCMD – – NVM Command Register Page 151
0x32 NVMCSR NVMBSY – – – – – – – Page 151
0x31 WDTCSR WDIF WDIE WDP3 – WDE WDP2 WDP1 WDP0 Page 33
0x30 SPCR SPIE SPE DORD MSTR CPOL CPHA SPR1 SPR0 Page 120
0x2F SPSR SPIF WCOL – – – – – SPI2X Page 121
0x2E SPDR SPI Data Register Page 122
0x2D TWSCRA TWSHE – TWDIE TWASIE TWEN TWSIE TWPME TWSME Page 130
0x2C TWSCRB – – – – – TWAA TWCMD[1.0] Page 130
0x2B TWSSRA TWDIF TWASIF TWCH TWRA TWC TWBE TWDIR TWAS Page 131
0x2A TWSA TWI Slave Address Register Page 133
0x29 TWSAM TWI Slave Address Mask Register Page 133
0x28 TWSD TWI Slave Data Register Page 133
0x27 TCNT1H Timer/Counter1 – Counter Register High Byte Page 89
0x26 TIMSK ICIE1 – OCIE1B OCIE1A TOIE1 OCIE0B OCIE0A TOIE0 Pages 75, 90
0x25 TIFR ICF1 – OCF1B OCF1A TOV1 OCF0B OCF0A TOV0 Pages 76, 90
0x24 TCCR1A TCW1 ICEN1 ICNC1 ICES1 CTC1 CS12 CS11 CS10 Page 88
0x23 TCNT1L Timer/Counter1 – Counter Register Low Byte Page 89
0x22 OCR1A Timer/Counter1 – Compare Register A Page 89
0x21 OCR1B Timer/Counter1 – Compare Register B Page 89
0x20 RAMAR RAM Address Register Page 17
0x1F RAMDR RAM Data Register Page 17
0x1E PUEC – – PUEC5 PUEC4 PUEC3 PUEC2 PUEC1 PUEC0 Page 59
0x1D PORTC – – PORTC5 PORTC4 PORTC3 PORTC2 PORTC1 PORTC0 Page 59
0x1C DDRC – – DDRC5 DDRC4 DDRC3 DDRC2 DDRC1 DDRC0 Page 59
0x1B PINC – – PINC5 PINC4 PINC3 PINC2 PINC1 PINC0 Page 59
0x1A PCMSK2 – – PCINT17 PCINT16 PCINT15 PCINT14 PCINT13 PCINT12 Page 40
0x19 TCCR0A COM0A1 COM0A0 COM0B1 COM0B0 – – WGM01 WGM00 Page 71
0x18 TCCR0B FOC0A FOC0B TSM PSR WGM02 CS02 CS01 CS00 Pages 74, 93
0x17 TCNT0 Timer/Counter0 – Counter Register Page 75
0x16 OCR0A Timer/Counter0 – Compare Register A Page 75
0x15 OCR0B Timer/Counter0 – Compare Register B Page 75
0x14 ACSRA ACD
ACBG/ACIRE
ACO ACI ACIE ACIC ACIS1 ACIS0 Page 95
0x13 ACSRB HSEL HLEV ACLP – ACCE ACME ACIRS1 ACIRS0 Page 96
0x12 ADCSRA ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0 Page 111
0x11 ADCSRB VDEN VDPD – – ADLAR ADTS2 ADTS1 ADTS0 Page 112
0x10 ADMUX – REFS REFEN ADC0EN MUX3 MUX2 MUX1 MUX0 Page 109
0x0F ADCH ADC Conversion Result – High Byte Page 111
0x0E ADCL ADC Conversion Result – Low Byte Page 111
0x0D DIDR0 ADC7D ADC6D ADC5D ADC4D ADC3D ADC2D ADC1D ADC0D Pages 97, 113
0x0C GIMSK
– PCIE2 PCIE1 PCIE0 – – – INT0 Page 39
0x0B GIFR
– PCIF2 PCIF1 PCIF0 – – – INTF0 Page 40
0x0A PCMSK1 – – – – PCINT11 PCINT10 PCINT9 PCINT8 Page 41
0x09 PCMSK0
PCINT7 PCINT6 PCINT5 PCINT4 PCINT3 PCINT2 PCINT1 PCINT0 Page 41
0x08 PORTCR ADC11D ADC10D ADC9D ADC8D
– BBMC BBMB BBMA Pages 58, 113
0x07 PUEB
– – – – PUEB3 PUEB2 PUEB1 PUEB0 Page 59
0x06 PORTB – – – – PORTB3 PORTB2 PORTB1 PORTB0 Page 59
0x05 DDRB
– – – – DDRB3 DDRB2 DDRB1 DDRB0 Page 59
0x04 PINB – – – – PINB3 PINB2 PINB1 PINB0 Page 59
0x03 PUEA PUEA7 PUEA6 PUEA5 PUEA4 PUEA3 PUEA2 PUEA1 PUEA0 Page 58
0x02 PORTA PORTA7 PORTA6 PORTA5 PORTA4 PORTA3 PORTA2 PORTA1 PORTA0 Page 58
0x01 DDRA DDRA7 DDRA6 DDRA5 DDRA4 DDRA3 DDRA2 DDRA1 DDRA0 Page 58
0x00 PINA
PINA7 PINA6 PINA5 PINA4 PINA3 PINA2 PINA1 PINA0 Page 59