Datasheet
Table Of Contents
- Features
- 1. Pin Configurations
- 2. Overview
- 3. About
- 4. CPU Core
- 5. Memories
- 6. Clock System
- 7. Power Management and Sleep Modes
- 8. System Control and Reset
- 9. Interrupts
- 10. I/O Ports
- 11. 8-bit Timer/Counter0 with PWM
- 11.1 Features
- 11.2 Overview
- 11.3 Clock Sources
- 11.4 Counter Unit
- 11.5 Output Compare Unit
- 11.6 Compare Match Output Unit
- 11.7 Modes of Operation
- 11.8 Timer/Counter Timing Diagrams
- 11.9 Register Description
- 11.9.1 TCCR0A – Timer/Counter Control Register A
- 11.9.2 TCCR0B – Timer/Counter Control Register B
- 11.9.3 TCNT0 – Timer/Counter Register
- 11.9.4 OCR0A – Output Compare Register A
- 11.9.5 OCR0B – Output Compare Register B
- 11.9.6 TIMSK0 – Timer/Counter 0 Interrupt Mask Register
- 11.9.7 TIFR0 – Timer/Counter 0 Interrupt Flag Register
- 12. 16-bit Timer/Counter1
- 12.1 Features
- 12.2 Overview
- 12.3 Timer/Counter Clock Sources
- 12.4 Counter Unit
- 12.5 Input Capture Unit
- 12.6 Output Compare Units
- 12.7 Compare Match Output Unit
- 12.8 Modes of Operation
- 12.9 Timer/Counter Timing Diagrams
- 12.10 Accessing 16-bit Registers
- 12.11 Register Description
- 12.11.1 TCCR1A – Timer/Counter1 Control Register A
- 12.11.2 TCCR1B – Timer/Counter1 Control Register B
- 12.11.3 TCCR1C – Timer/Counter1 Control Register C
- 12.11.4 TCNT1H and TCNT1L – Timer/Counter1
- 12.11.5 OCR1AH and OCR1AL – Output Compare Register 1 A
- 12.11.6 OCR1BH and OCR1BL – Output Compare Register 1 B
- 12.11.7 ICR1H and ICR1L – Input Capture Register 1
- 12.11.8 TIMSK1 – Timer/Counter Interrupt Mask Register 1
- 12.11.9 TIFR1 – Timer/Counter Interrupt Flag Register 1
- 13. Timer/Counter Prescaler
- 14. USI – Universal Serial Interface
- 15. Analog Comparator
- 16. Analog to Digital Converter
- 16.1 Features
- 16.2 Overview
- 16.3 Operation
- 16.4 Starting a Conversion
- 16.5 Prescaling and Conversion Timing
- 16.6 Changing Channel or Reference Selection
- 16.7 ADC Noise Canceler
- 16.8 Analog Input Circuitry
- 16.9 Noise Canceling Techniques
- 16.10 ADC Accuracy Definitions
- 16.11 ADC Conversion Result
- 16.12 Temperature Measurement
- 16.13 Register Description
- 17. debugWIRE On-chip Debug System
- 18. Self-Programming the Flash
- 18.1 Performing Page Erase by SPM
- 18.2 Filling the Temporary Buffer (Page Loading)
- 18.3 Performing a Page Write
- 18.4 Addressing the Flash During Self-Programming
- 18.5 EEPROM Write Prevents Writing to SPMCSR
- 18.6 Reading Lock, Fuse and Signature Data from Software
- 18.7 Preventing Flash Corruption
- 18.8 Programming Time for Flash when Using SPM
- 18.9 Register Description
- 19. Memory Programming
- 19.1 Program And Data Memory Lock Bits
- 19.2 Fuse Bytes
- 19.3 Device Signature Imprint Table
- 19.4 Page Size
- 19.5 Serial Programming
- 19.6 High-voltage Serial Programming
- 19.7 High-Voltage Serial Programming Algorithm
- 19.7.1 Enter High-voltage Serial Programming Mode
- 19.7.2 Considerations for Efficient Programming
- 19.7.3 Chip Erase
- 19.7.4 Programming the Flash
- 19.7.5 Programming the EEPROM
- 19.7.6 Reading the Flash
- 19.7.7 Reading the EEPROM
- 19.7.8 Programming and Reading the Fuse and Lock Bits
- 19.7.9 Reading the Signature Bytes and Calibration Byte
- 19.7.10 Power-off sequence
- 20. Electrical Characteristics
- 21. Typical Characteristics
- 21.1 Supply Current of I/O Modules
- 21.2 Active Supply Current
- 21.3 Idle Supply Current
- 21.4 Power-down Supply Current
- 21.5 Standby Supply Current
- 21.6 Pin Pull-up
- 21.7 Pin Driver Strength
- 21.8 Pin Threshold and Hysteresis
- 21.9 BOD Threshold and Analog Comparator Offset
- 21.10 Internal Oscillator Speed
- 21.11 Current Consumption of Peripheral Units
- 21.12 Current Consumption in Reset and Reset Pulsewidth
- 22. Register Summary
- 23. Instruction Set Summary
- 24. Ordering Information
- 25. Packaging Information
- 26. Errata
- 27. Datasheet Revision History
- Table of Contents

213
8006K–AVR–10/10
ATtiny24/44/84
22. Register Summary
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page
0x3F (0x5F) SREG I T H S V N Z C Page 8
0x3E (0x5E) SPH – – – – – – SP9 SP8 Page 11
0x3D (0x5D) SPL SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0 Page 11
0x3C (0x5C) OCR0B
Timer/Counter0 – Output Compare Register B
Page 85
0x3B (0x5B) GIMSK – INT0 PCIE1
PCIE0
– – – – Page 51
0x3A (0x5A GIFR – INTF0 PCIF1
PCIF0
– – – – Page 52
0x39 (0x59) TIMSK0 – – – – – OCIE0B OCIE0A TOIE0 Page 85
0x38 (0x58) TIFR0 – – – – OCF0B OCF0A TOV0 Page 85
0x37 (0x57) SPMCSR – – RSIG CTPB RFLB PGWRT PGERS SPMEN Page 157
0x36 (0x56) OCR0A
Timer/Counter0 – Output Compare Register A
Page 84
0x35 (0x55) MCUCR BODS PUD SE SM1 SM0 BODSE ISC01 ISC00 Pages 36, 51, and 67
0x34 (0x54) MCUSR – – – – WDRF BORF EXTRF PORF Page 45
0x33 (0x53) TCCR0B FOC0A FOC0B – – WGM02 CS02 CS01 CS00 Page 83
0x32 (0x52) TCNT0 Timer/Counter0 Page 84
0x31 (0x51) OSCCALCAL7CAL6CAL5CAL4CAL3CAL2CAL1CAL0 Page 30
0x30 (0x50) TCCR0A COM0A1 COM0A0 COM0B1 COM0B0 – WGM01 WGM00 Page 80
0x2F (0x4F) TCCR1A COM1A1 COM1A0 COM1B1 COM1B0 – WGM11 WGM10 Page 108
0x2E (0x4E) TCCR1B ICNC1 ICES1 – WGM13 WGM12 CS12 CS11 CS10 Page 110
0x2D (0x4D) TCNT1H Timer/Counter1 – Counter Register High Byte Page 112
0x2C (0x4C) TCNT1L Timer/Counter1 – Counter Register Low Byte Page 112
0x2B (0x4B) OCR1AH Timer/Counter1 – Compare Register A High Byte Page 112
0x2A (0x4A) OCR1AL Timer/Counter1 – Compare Register A Low Byte Page 112
0x29 (0x49) OCR1BH Timer/Counter1 – Compare Register B High Byte Page 112
0x28 (0x48) OCR1BL Timer/Counter1 – Compare Register B Low Byte Page 112
0x27 (0x47) DWDR DWDR[7:0] Page 152
0x26 (0x46) CLKPR CLKPCE – – – CLKPS3 CLKPS2 CLKPS1 CLKPS0 Page 31
0x25 (0x45) ICR1H Timer/Counter1 - Input Capture Register High Byte Page 113
0x24 (0x44) ICR1L Timer/Counter1 - Input Capture Register Low Byte Page 113
0x23 (0x43) GTCCR TSM – – – – – – PSR10 Page 116
0x22 (0x42) TCCR1C FOC1A FOC1B – – – – – – Page 111
0x21 (0x41) WDTCSR WDIF WDIE WDP3 WDCE WDE WDP2 WDP1 WDP0 Page 45
0x20 (0x40) PCMSK1 – – – – PCINT11 PCINT10 PCINT9 PCINT8 Page 52
0x1F (0x3F) EEARH – – – – – – – EEAR8 Page 20
0x1E (0x3E) EEARL EEAR7 EEAR6 EEAR5 EEAR4 EEAR3 EEAR2 EEAR1 EEAR0 Page 21
0x1D (0x3D) EEDR EEPROM Data Register Page 21
0x1C (0x3C) EECR – – EEPM1 EEPM0 EERIE EEMPE EEPE EERE Page 21
0x1B (0x3B) PORTA PORTA7 PORTA6 PORTA5 PORTA4 PORTA3 PORTA2 PORTA1 PORTA0 Page 67
0x1A (0x3A) DDRA DDA7 DDA6 DDA5 DDA4 DDA3 DDA2 DDA1 DDA0 Page 67
0x19 (0x39) PINA PINA7 PINA6 PINA5 PINA4 PINA3 PINA2 PINA1 PINA0 Page 68
0x18 (0x38) PORTB – – – – PORTB3 PORTB2 PORTB1 PORTB0 Page 68
0x17 (0x37) DDRB – – – – DDB3 DDB2 DDB1 DDB0 Page 68
0x16 (0x36) PINB
– – – – PINB3 PINB2 PINB1 PINB0 Page 68
0x15 (0x35) GPIOR2 General Purpose I/O Register 2 Page 23
0x14 (0x34) GPIOR1 General Purpose I/O Register 1 Page 23
0x13 (0x33) GPIOR0 General Purpose I/O Register 0 Page 23
0x12 (0x32) PCMSK0 PCINT7 PCINT6 PCINT5 PCINT4 PCINT3 PCINT2 PCINT1 PCINT0 Page 53
0x11 (0x31)) Reserved –
0x10 (0x30) USIBR USI Buffer Register Page 125
0x0F (0x2F) USIDR USI Data Register Page 124
0x0E (0x2E) USISR USISIF USIOIF USIPF USIDC USICNT3 USICNT2 USICNT1 USICNT0 Page 125
0x0D (0x2D) USICR USISIE USIOIE USIWM1 USIWM0 USICS1 USICS0 USICLK USITC Page 126
0x0C (0x2C) TIMSK1 – –ICIE1– – OCIE1B OCIE1A TOIE1 Page 113
0x0B (0x2B) TIFR1 – –ICF1– – OCF1B OCF1A TOV1 Page 114
0x0A (0x2A) Reserved
–
0x09 (0x29) Reserved
–
0x08 (0x28) ACSR ACD ACBG
ACO ACI ACIE ACIC ACIS1 ACIS0 Page 130
0x07 (0x27) ADMUX REFS1 REFS0 MUX5 MUX4 MUX3 MUX2 MUX1 MUX0 Page 145
0x06 (0x26) ADCSRA ADEN ADSC
ADATE ADIF ADIE ADPS2 ADPS1 ADPS0 Page 147
0x05 (0x25) ADCH ADC Data Register High Byte Page 149
0x04 (0x24) ADCL ADC Data Register Low Byte Page 149
0x03 (0x23) ADCSRB BIN ACME –ADLAR– ADTS2 ADTS1 ADTS0 Page 131, Page 149
0x02 (0x22) Reserved
–
0x01 (0x21) DIDR0 ADC7D ADC6D ADC5D ADC4D ADC3D ADC2D ADC1D ADC0D Page 131, Page 150
0x00 (0x20) PRR
– – – – PRTIM1 PRTIM0 PRUSI PRADC Page 37