Datasheet

83
8246A–AVR–11/09
ATtiny2313A/4313
Table 11-7 shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to phase cor-
rect PWM mode.
Note: 1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See “Phase Correct PWM Mode” on
page 78 for more details.
• Bits 3, 2 – Res: Reserved Bits
These bits are reserved bits in the ATtiny2313A/4313 and will always read as zero.
• Bits 1:0 – WGM01:0: Waveform Generation Mode
Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see Table 11-8. Modes of operation supported by the Timer/Counter
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of
Pulse Width Modulation (PWM) modes (see “Modes of Operation” on page 75).
Notes: 1. MAX = 0xFF
2. BOTTOM = 0x00
Table 11-7. Compare Output Mode, Phase Correct PWM Mode
(1)
COM0B1 COM0B0 Description
0 0 Normal port operation, OCR0B disconnected.
01Reserved
10
Clear ORC0B on Compare Match when up-counting. Set OCR0B
on Compare Match when down-counting.
11
Set OCR0B on Compare Match when up-counting. Clear OCR0B
on Compare Match when down-counting.
Table 11-8. Waveform Generation Mode Bit Description
Mode WGM2 WGM1 WGM0
Timer/Count
er Mode of
Operation TOP
Update of
OCRx at
TOV Flag
Set on
(1)(2)
0 0 0 0 Normal 0xFF Immediate MAX
10 0 1
PWM, Phase
Correct
0xFF TOP BOTTOM
2 0 1 0 CTC OCR0A Immediate MAX
3 0 1 1 Fast PWM 0xFF TOP MAX
4100Reserved–– –
51 0 1
PWM, Phase
Correct
OCR0A TOP BOTTOM
6110Reserved–– –
7 1 1 1 Fast PWM OCR0A TOP TOP