Datasheet

62
8246A–AVR–11/09
ATtiny2313A/4313
Table 10-4 relates the alternate functions of Port A to the overriding signals shown in Figure 10-
5 on page 59.
Notes: 1. RSTDISBL is 1 when the fuse is “0” (Programmed).
2. DebugWIRE is enabled when DWEN Fuse is programmed and Lock bits are unprogrammed.
3. EXT_OSC = crystal oscillator or low frequency crystal oscillator is selected as system clock.
4. EXT_CLOCK = external closk is selected as system clock.
10.2.2 Alternate Functions of Port B
The Port B pins with alternate function are shown in Table 10-5.
Table 10-4. Overriding Signals for Alternate Functions in PA2..PA0
Signal
Name PA2/RESET/dW/PCINT10 PA1/XTAL2/PCINT9 PA0/XTAL1/PCINT8
PUOE
RSTDISBL
(1)
+
DEBUGWIRE_ENABLE
(2)
EXT_OSC
(3)
EXT_CLOCK
(4)
+ EXT_OSC
(3)
PUOV 1 0 0
DDOE
RSTDISBL
(1)
+
DEBUGWIRE_ENABLE
(2)
EXT_OSC
(3)
EXT_CLOCK
(4)
+ EXT_OSC
(3)
DDOV
DEBUGWIRE_ENABLE
(2)
• debugWire Transmit
00
PVOE
RSTDISBL
(1)
+
DEBUGWIRE_ENABLE
(2)
EXT_OSC
(3)
EXT_CLOCK
(4)
+ EXT_OSC
(3)
PVOV 0 0 0
PTOE 0 0 0
DIEOE
RSTDISBL
(1)
+
DEBUGWIRE_ENABLE
(2)
+ PCINT10 • PCIE1
EXT_OSC
(3)
+ PCINT9
• PCIE1
EXT_CLOCK
(4)
+ EXT_OSC
(3)
+ (PCINT8 • PCIE1)
DIEOV
DEBUGWIRE_ENABLE
(2)
+ (RSTDISBL
(1)
• PCINT10
• PCIE1)
EXT_OSC
(3)
+ PCINT9
• PCIE1
(EXT_CLOCK
(4)
• PWR_DOWN) +
(EXT_CLOC
K
(4)
• EXT_OSC
(3)
•
PCINT8 • PCIE1)
DI dW/PCINT10 Input PCINT9 Input CLKI/PCINT8 Input
AIO XTAL2 XTAL1
Table 10-5. Port B Pins Alternate Functions
Port Pin Alternate Function
PB0
AIN0: Analog Comparator, Positive Input
PCINT0:Pin Change Interrupt 0, Source 0
PB1
AIN1: Analog Comparator, Negative Input
PCINT1: Pin Change Interrupt 0, Source 1
PB2
OC0A:: Timer/Counter0 Compare Match AOutput
PCINT2: Pin Change Interrupt 0, Source 2
PB3
OC1A: Timer/Counter1 Compare Match A Output
PCINT3: Pin Change Interrupt 0, Source 3