Datasheet

49
8246A–AVR–11/09
ATtiny2313A/4313
9.2.1 Low Level Interrupt
A low level interrupt on INT0 or INT1 is detected asynchronously. This means that the interrupt
source can be used for waking the part also from sleep modes other than Idle (the I/O clock is
halted in all sleep modes except Idle).
Note that if a level triggered interrupt is used for wake-up from Power-down, the required level
must be held long enough for the MCU to complete the wake-up to trigger the level interrupt. If
the level disappears before the end of the Start-up Time, the MCU will still wake up, but no inter-
rupt will be generated. The start-up time is defined by the SUT and CKSEL fuses, as described
in “Clock System” on page 24.
If the low level on the interrupt pin is removed before the device has woken up then program
execution will not be diverted to the interrupt service routine but continue from the instruction fol-
lowing the SLEEP command.
9.2.2 Pin Change Interrupt Timing
A timing example of a pin change interrupt is shown in Figure 9-1.
Figure 9-1. Timing of pin change interrupts
clk
PCINT(0)
pin_lat
pin_sync
pcint_in_(0)
pcint_syn
pcint_setflag
PCIF
PCINT(0)
pin_sync
pcint_syn
pin_lat
D Q
LE
pcint_setflag
PCIF
clk
clk
PCINT(0) in PCMSK(x)
pcint_in_(0)
0
x