Datasheet

8246A–AVR–11/09

ATtiny2313A/4313

6.4 Clock Output Buffer

The device can output the system clock on the CLKO pin. To enable the output, the CKOUT

fuse has to be programmed. This mode is suitable when the chip clock is used to drive other cir-

cuits on the system. Note that the clock will not be output during reset and that the normal

operation of the I/O pin will be overridden when the fuse is programmed. Any clock source,

including the internal RC Oscillator, can be selected when the clock is output on CLKO. If the

System Clock Prescaler is used, it is the divided system clock that is output.

6.5 Register Description

6.5.1 OSCCAL – Oscillator Calibration Register

• Bit 7 – Res: Reserved Bit

This bit is reserved bit in ATtiny2313A/4313 and it will always read zero.

• Bits 6:0 – CAL[6:0]: Oscillator Calibration Value

Writing the calibration byte to this address will trim the internal Oscillator to remove process vari-

ations from the Oscillator frequency. This is done automatically during Chip Reset. When

OSCCAL is zero, the lowest available frequency is chosen. Writing non-zero values to this regis-

ter will increase the frequency of the internal Oscillator. Writing 0x7F to the register gives the

highest available frequency.

The calibrated Oscillator is used to time EEPROM and Flash access. If EEPROM or Flash is

written, do not calibrate to more than 10% above the nominal frequency. Otherwise, the

EEPROM or Flash write may fail. Note that the Oscillator is intended for calibration to 8 MHz or 4

MHz. Tuning to other values is not guaranteed, as indicated in Table 6-8 below.

To ensure stable operation of the MCU the calibration value should be changed in small steps. A

variation in frequency of more than 2% from one cycle to the next can lead to unpredicatble

behavior. Changes in OSCCAL should not exceed 0x20 for each calibration. It is required to

ensure that the MCU is kept in Reset during such changes in the clock frequency

6.5.2 CLKPR – Clock Prescale Register

• Bit 7 – CLKPCE: Clock Prescaler Change Enable

Bit 76543210

0x31 (0x51) – CAL6 CAL5 CAL4 CAL3 CAL2 CAL1 CAL0 OSCCAL

Read/Write R R/W R/W R/W R/W R/W R/W R/W

Initial Value 0 Device Specific Calibration Value

Table 6-8. Internal RC Oscillator Frequency Range

OSCCAL Value

Typical Lowest Frequency

with Respect to Nominal Frequency

Typical Highest Frequency

with Respect to Nominal Frequency

0x00 50% 100%

0x3F 75% 150%

0x7F 100% 200%

Bit 7 6 5 4 3 2 1 0

0x26 (0x46)

CLKPCE – – – CLKPS3 CLKPS2 CLKPS1 CLKPS0 CLKPR

Read/Write R/W R R R R/W R/W R/W R/W

Initial Value 0 0 0 0 See Bit Description