Datasheet

i
8246A–AVR–11/09
ATtiny2313A/4313
Table of Contents
Features ..................................................................................................... 1
1 Pin Configurations ................................................................................... 2
1.1 Pin Descriptions .................................................................................................2
2 Overview ................................................................................................... 4
2.1 Block Diagram ...................................................................................................4
2.2 Comparison Between ATtiny2313A and ATtiny4313 ........................................5
3 About ......................................................................................................... 6
3.1 Resources .........................................................................................................6
3.2 Code Examples .................................................................................................6
3.3 Data Retention ...................................................................................................6
3.4 Disclaimer ..........................................................................................................6
4CPU Core .................................................................................................. 7
4.1 Architectural Overview .......................................................................................7
4.2 ALU – Arithmetic Logic Unit ...............................................................................8
4.3 Status Register ..................................................................................................8
4.4 General Purpose Register File ..........................................................................9
4.5 Stack Pointer ...................................................................................................11
4.6 Instruction Execution Timing ...........................................................................11
4.7 Reset and Interrupt Handling ...........................................................................12
5 Memories ................................................................................................ 15
5.1 In-System Reprogrammable Flash Program Memory .....................................15
5.2 SRAM Data Memory ........................................................................................16
5.3 EEPROM Data Memory ..................................................................................17
5.4 I/O Memory ......................................................................................................21
5.5 Register Description ........................................................................................21
6 Clock System ......................................................................................... 24
6.1 Clock Subsystems ...........................................................................................24
6.2 Clock Sources .................................................................................................25
6.3 System Clock Prescaler ..................................................................................29
6.4 Clock Output Buffer .........................................................................................30
6.5 Register Description ........................................................................................30
7 Power Management and Sleep Modes ................................................. 33