Datasheet

178
ATtiny2313/V
2543H–AVR–02/05
Notes: 1. All DC Characteristics contained in this data sheet are based on simulation and characterization of other AVR microcontrol-
lers manufactured in the same process technology. These values are preliminary values representing design targets, and
will be updated after characterization of actual silicon.
2. “Max” means the highest value where the pin is guaranteed to be read as low.
3. “Min” means the lowest value where the pin is guaranteed to be read as high.
4. Although each I/O port can sink more than the test conditions (10 mA at V
CC
= 5V, 5 mA at V
CC
= 3V) under steady state
conditions (non-transient), the following must be observed:
1] The sum of all IOL, for all ports, should not exceed 60 mA.
If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater
than the listed test condition.
5. Although each I/O port can source more than the test conditions (10 mA at V
CC
= 5V, 5 mA at V
CC
= 3V) under steady state
conditions (non-transient), the following must be observed:
1] The sum of all IOH, for all ports, should not exceed 60 mA.
If IOH exceeds the test condition, VOH may exceed the related specification. Pins are not guaranteed to source current
greater than the listed test condition.
External Clock Drive
Waveforms
Figure 81. External Clock Drive Waveforms
External Clock Drive
I
CC
Power Supply Current
Active 1MHz, V
CC
= 2V 0.35 mA
Active 4MHz, V
CC
= 3V 2 mA
Active 8MHz, V
CC
= 5V 6 mA
Idle 1MHz, V
CC
= 2V 0.08 0.2 mA
Idle 4MHz, V
CC
= 3V 0.41 1 mA
Idle 8MHz, V
CC
= 5V 1.6 3 mA
Power-down mode
WDT enabled, V
CC
= 3V < 3 6 µA
WDT disabled, V
CC
= 3V < 0.5 2 µA
T
A
= -40°C to 85°C, V
CC
= 1.8V to 5.5V (unless otherwise noted)
(1)
(Continued)
Symbol Parameter Condition Min. Typ. Max. Units
V
IL1
V
IH1
Table 80. External Clock Drive (Estimated Values)
Symbol Parameter
V
CC
= 1.8 - 5.5V V
CC
= 2.7 - 5.5V V
CC
= 4.5 - 5.5V
UnitsMin. Max. Min. Max. Min. Max.
1/t
CLCL
Oscillator
Frequency
0 4 010020MHz
t
CLCL
Clock Period 250 100 50 ns
t
CHCX
High Time 100 40 20 ns
t
CLCX
Low Time 100 40 20 ns