Datasheet

161
ATtiny2313/V
2543H–AVR–02/05
Parallel Programming
Parameters, Pin
Mapping, and
Commands
This section describes how to parallel program and verify Flash Program memory,
EEPROM Data memory, Memory Lock bits, and Fuse bits in the ATtiny2313. Pulses are
assumed to be at least 250 ns unless otherwise noted.
Signal Names In this section, some pins of the ATtiny2313 are referenced by signal names describing
their functionality during parallel programming, see Figure 69 and Table 71. Pins not
described in the following table are referenced by pin names.
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a posi-
tive pulse. The bit coding is shown in Table 73.
When pulsing WR
or OE, the command loaded determines the action executed. The dif-
ferent Commands are shown in Table 74.
Figure 69. Parallel Programming
Table 70. No. of Words in a Page and No. of Pages in the EEPROM
EEPROM Size Page Size PCWORD No. of Pages PCPAGE EEAMSB
128 bytes 4 bytes EEA[1:0] 32 EEA[6:2] 6
Table 71. Pin Name Mapping
Signal Name
in
Programming
Mode
Pin
Name I/O Function
RDY/BSY
PD1 O
0: Device is busy programming, 1: Device is ready for
new command.
OE
PD2 I Output Enable (Active low).
WR
PD3 I Write Pulse (Active low).
BS1/PAGEL PD4 I
Byte Select 1 (“0” selects low byte, “1” selects high
byte).
Program Memory and EEPROM Data Page Load.
VCC
+5V
GND
XTAL1
PD1
PD2
PD3
PD4
PD5
PD6
PB7 - PB0 DATA I/O
RESET
+12 V
BS1/PAGEL
XA0
XA1/BS2
OE
RDY/BSY
WR