Datasheet
132
ATtiny2313/V
2543H–AVR–02/05
USART Control and Status
Register C – UCSRC
• Bit 6 – UMSEL: USART Mode Select
This bit selects between asynchronous and synchronous mode of operation.
• Bit 5:4 – UPM1:0: Parity Mode
These bits enable and set type of parity generation and check. If enabled, the Transmit-
ter will automatically generate and send the parity of the transmitted data bits within
each frame. The Receiver will generate a parity value for the incoming data and com-
pare it to the UPM0 setting. If a mismatch is detected, the UPE Flag in UCSRA will be
set.
• Bit 3 – USBS: Stop Bit Select
This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver
ignores this setting.
• Bit 2:1 – UCSZ1:0: Character Size
The UCSZ1:0 bits combined with the UCSZ2 bit in UCSRB sets the number of data bits
(Character SiZe) in a frame the Receiver and Transmitter use. See Table 54 on page
133.
Bit 76543210
– UMSEL UPM1 UPM0 USBS UCSZ1 UCSZ0 UCPOL UCSRC
Read/Write R R/W R/W R/W R/W R/W R/W R/W
Initial Value00000110
Table 51. UMSEL Bit Settings
UMSEL Mode
0 Asynchronous Operation
1 Synchronous Operation
Table 52. UPM Bits Settings
UPM1 UPM0 Parity Mode
0 0 Disabled
01Reserved
1 0 Enabled, Even Parity
1 1 Enabled, Odd Parity
Table 53. USBS Bit Settings
USBS Stop Bit(s)
01-bit
12-bit