Datasheet

7728G–AVR–06/10

ATtiny87/ATtiny167

Figure 10-4. Compare Match Output Logic

10.6.1 Compare Output Function

The general I/O port function is overridden by the Output Compare (OC0A) from the Wave-

form Generator if either of the COM0A1:0 bits are set. However, the OC0A pin direction (input

or output) is still controlled by the Data Direction Register (DDR) for the port pin. The Data

Direction Register bit for the OC0A pin (DDR_OC0A) must be set as output before the OC0A

value is visible on the pin. The port override function is independent of the Waveform Genera-

tion mode.

The design of the Output Compare pin logic allows initialization of the OC0A state before the

output is enabled. Note that some COM0A1:0 bit settings are reserved for certain modes of

operation. See ”8-bit Timer/Counter Register Description” on page 100.

10.6.2 Compare Output Mode and Waveform Generation

The Waveform Generator uses the COM0A1:0 bits differently in normal, CTC, and PWM

modes. For all modes, setting the COM0A1:0 = 0 tells the Waveform Generator that no action

on the OC0A Register is to be performed on the next compare match. For compare output

actions in the non-PWM modes refer to Table 10-1 on page 101. For fast PWM mode, refer to

Table 10-2 on page 101, and for phase correct PWM refer to Table 10-3 on page 101.

A change of the COM0A1:0 bits state will have effect at the first compare match after the bits

are written. For non-PWM modes, the action can be forced to have immediate effect by using

the FOC0A strobe bits.

10.7 Modes of Operation

The mode of operation, i.e., the behavior of the Timer/Counter and the Output Compare pins,

is defined by the combination of the Waveform Generation mode (WGM01:0) and Compare

Output mode (COM0A1:0) bits. The Compare Output mode bits do not affect the counting

sequence, while the Waveform Generation mode bits do. The COM0A1:0 bits control whether

the PWM output generated should be inverted or not (inverted or non-inverted PWM). For

non-PWM modes the COM0A1:0 bits control whether the output should be set, cleared, or tog-

gled at a compare match (See ”Compare Match Output Unit” on page 91.).

PORT

DDR

OCnx

Waveform

Generator

COMnx1

COMnx0

DATA BUS

FOCnx

clk

I/O