Datasheet

86
7728G–AVR–06/10
ATtiny87/ATtiny167
9.4 Register Description for I/O Ports
9.4.1 Port A Data Register – PORTA
9.4.2 Port A Data Direction Register – DDRA
9.4.3 Port A Input Pins Register – PINA
9.4.4 Port B Data Register – PORTB
9.4.5 Port B Data Direction Register – DDRB
9.4.6 Port B Input Pins Register – PINB
Bit 76543210
PORTA7 PORTA6 PORTA5 PORTA4 PORTA3 PORTA2 PORTA1 PORTA0 PORTA
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
DDA7 DDA6 DDA5 DDA4 DDA3 DDA2 DDA1 DDA0 DDRA
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
PINA7 PINA6 PINA5 PINA4 PINA3 PINA2 PINA1 PINA0 PINA
Read/Write R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W)
Initial Value N/A N/A N/A N/A N/A N/A N/A N/A
Bit 76543210
PORTB7 PORTB6 PORTB5 PORTB4 PORTB3 PORTB2 PORTB1 PORTB0 PORTB
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
DDB7 DDB6 DDB5 DDB4 DDB3 DDB2 DDB1 DDB0 DDRB
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
PINB7 PINB6 PINB5 PINB4 PINB3 PINB2 PINB1 PINB0 PINB
Read/Write R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W)
Initial Value N/A N/A N/A N/A N/A N/A N/A N/A