Datasheet

80
7728G–AVR–06/10
ATtiny87/ATtiny167
Table 9-5. Overriding Signals for Alternate Functions in PA3..PA0
Signal
Name
PA3/PCINT3/ADC3/
ISRC/INT1
PA2/PCINT2/ADC2/
OC0A/DO/MISO
PA1/PCINT1/ADC1/
TXD/TXLIN
PA0/PCINT0/ADC0/
RXD/RXLIN
PUOE 0 SPE & MSTR
LIN_TX_ENABLE LIN_RX_ENABLE
PUOV PORTA3 & PUD
PORTA2 & PUD
{ (LIN_TX_ENABLE)
?
(0) : (PORTA1 & PUD
)
}
PORTA0 & PUD
DDOE 0 SPE & MSTR LIN_TX_ENABLE LIN_RX_ENABLE
DDOV 0 0 LIN_TX_ENABLE 0
PVOE 0
(SPE & MSTR) |
(USI_2_WIRE
&
USI_3_WIRE & USIPOS) |
OC0A
LIN_TX_ENABLE 0
PVOV 0
{ (SPE & MSTR) ?
(MISO_OUTPUT) :
(
( USI_2_WIRE &
USI_3_WIRE & USIPOS ) ?
(USI_SHIFTOUT) : (OC0A) )
}
{ (LIN_TX_ENABLE)
?
(LIN_TX) : (0) }
0
PTOE 0 0 0 0
DIEOE
ADC3D |
INT1_ENABLE |
(PCIE0 &
PCMSK03)
ADC2D |
(PCIE0 & PCMSK02)
ADC1D |
(PCIE0 & PCMSK01)
ADC0D |
(PCIE0 & PCMSK00)
DIEOV
INT1_ENABLE |
(PCIE0 &
PCMSK03)
PCIE0 & PCMSK02 PCIE0 & PCMSK01 PCIE0 & PCMSK00
DI PCINT3 -/- INT1 PCINT2 -/- MISO PCINT1 PCINT0
AIO ADC3 -/- ISRC ADC2 ADC1 ADC0