Datasheet

47
7728G–AVR–06/10
ATtiny87/ATtiny167
• Bit 0 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the
SLEEP instruction is executed. To avoid the MCU entering the sleep mode unless it is the pro-
grammer’s purpose, it is recommended to write the Sleep Enable (SE) bit to one just before
the execution of the SLEEP instruction and to clear it immediately after waking up.
5.9.2 MCUCR – MCU Control Register
• Bit 6 – BODS: BOD Sleep
The BODS bit must be written to logic one in order to turn off BOD during sleep, see Table 5-1
on page 42. Writing to the BODS bit is controlled by a timed sequence and an enable bit,
BODSE in MCUCR. To disable BOD in relevant sleep modes, both BODS and BODSE must
first be set to one. Then, to set the BODS bit, BODS must be set to one and BODSE must be
set to zero within four clock cycles.
The BODS bit is active three clock cycles after it is set. A sleep instruction must be executed
while BODS is active in order to turn off the BOD for the actual sleep mode. The BODS bit is
automatically cleared after three clock cycles.
• Bit 5 – BODSE: BOD Sleep Enable
BODSE enables setting of BODS control bit, as explained in BODS bit description. BOD dis-
able is controlled by a timed sequence.
5.9.3 PRR – Power Reduction Register
• Bit 7 - Res: Reserved bit
This bit is reserved in ATtiny87/167 and will always read as zero.
• Bit 6 - Res: Reserved bit
This bit is reserved in ATtiny87/167 and will always read as zero.
Table 5-2. Sleep Mode Select
SM1 SM0 Sleep Mode
00Idle
0 1 ADC Noise Reduction
10Power-down
11Power-save
Bit 7 6 5 4 3 2 1 0
– BODS BODSE PUD – – – – MCUCR
Read/Write R R/W R/W R/W R R R R
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
– – PRLIN PRSPI PRTIM1 PRTIM0 PRUSI PRADC PRR
Read/Write R R R/WR/WR/WR/WR/WR/W
Initial Value 0 0 0 0 0 0 0 0