Datasheet

246
7728G–AVR–06/10
ATtiny87/ATtiny167
22.4.3 External Clock Drive
22.5 RESET Characteristics
Note: 1. Before rising, the supply has to be between VPORMIN and VPORMAX to ensure a Reset.
Table 22-2. External Clock Drive
Symbol Parameter
Vcc = 2.7 - 5.5V Vcc = 4.5 - 5.5V
UnitsMin. Max. Min. Max.
1/t
CLCL
Oscillator Frequency 0 8 0 16 MHz
t
CLCL
Clock Period 125 62.5 ns
t
CHCX
High Time 50 25 ns
t
CLCX
Low Time 50 25 ns
t
CLCH
Rise Time 1.6 0.5 ms
t
CHCL
Fall Time 1.6 0.5 ms
Δt
CLCL
Change in period from one clock
cycle to the next
22%
Table 22-3. External Reset Characteristics
Symbol Parameter Condition Min Typ Max Units
V
RST
RESET Pin Threshold
Voltage
V
CC
= 5V 0.1 Vcc 0.9 Vcc V
t
RST
Minimum pulse width on
RESET
Pin
V
CC
= 5V 2.5 µs
V
BG
Bandgap reference voltage
V
CC
= 2.7V,
T
A
=25°C
1.0 1.1 1.2 V
t
BG
Bandgap reference start-up
time
V
CC
= 2.7V,
T
A
=25°C
40 70 µs
I
BG
Bandgap reference current
consumption
V
CC
= 2.7V,
T
A
=25°C
15 µA
Table 22-4. Power On Reset Characteristics
Symbol Parameter Min Typ Max Units
VPOT
Power-on Reset Threshold Voltage (rising) 1.4 V
Power-on Reset Threshold Voltage (falling)
(1)
1.0 1.3 1.6 V
VPORMAX
VCC Max. start voltage to ensure internal
Power-on Reset signal
0.4 V
VPORMIN
VCC Min. start voltage to ensure internal
Power-on Reset signal
–0.1 V
VCCRR VCC Rise Rate to ensure Power-on Reset 0.01 V/ms
VRST RESET Pin Threshold Voltage 0.1 Vcc
0.9
Vcc
V