Datasheet

225
7728G–AVR–06/10
ATtiny87/ATtiny167
21. Memory Programming
21.1 Program and Data Memory Lock Bits
The ATtiny87/167 provides two Lock bits which can be left unprogrammed (“1”) or can be pro-
grammed (“0”) to obtain the additional features listed in Table 21-2. The Lock bits can only be
erased to “1” with the Chip Erase command. The ATtiny87/167 has no separate Boot Loader
section.
Note: “1” means unprogrammed, “0” means programmed.
Notes: 1. Program the Fuse bits before programming the LB1 and LB2.
2. “1” means unprogrammed, “0” means programmed
21.2 Fuse Bits
The ATtiny87/167 has three Fuse bytes. Table 21-3, Table 21-4 & Table 21-5 describe briefly
the functionality of all the fuses and how they are mapped into the Fuse bytes.
The SPM instruction is enabled for the whole Flash if the SELFPRGEN fuse is programmed
(“0”), otherwise it is disabled.
Table 21-1. Lock Bit Byte
(Note:)
Lock Bit Byte Bit No Description Default Value
7 – 1 (unprogrammed)
6 – 1 (unprogrammed)
5 – 1 (unprogrammed)
4 – 1 (unprogrammed)
3 – 1 (unprogrammed)
2 – 1 (unprogrammed)
LB2 1 Lock bit 1 (unprogrammed)
LB1 0 Lock bit 1 (unprogrammed)
Table 21-2. Lock Bit Protection Modes
(1)(2)
Memory Lock Bits Protection Type
LB Mode LB2 LB1
1 1 1 No memory lock features enabled.
210
Further programming of the Flash and EEPROM is disabled in
Parallel and Serial Programming mode. The Fuse bits are locked
in both Serial and Parallel Programming mode.
(1)
300
Further programming and verification of the Flash and EEPROM
is disabled in Parallel and Serial Programming mode. The Fuse
bits are locked in both Serial and Parallel Programming mode.
(1)