Datasheet

222
7728G–AVR–06/10
ATtiny87/ATtiny167
20.2.5 Preventing Flash Corruption
During periods of low Vcc, the Flash program can be corrupted because the supply voltage is
too low for the CPU and the Flash to operate properly. These issues are the same as for board
level systems using the Flash, and the same design solutions should be applied.
A Flash program corruption can be caused by two situations when the voltage is too low.
• First, a regular write sequence to the Flash requires a minimum voltage to operate
correctly.
• Secondly, the CPU itself can execute instructions incorrectly, if the supply voltage for
executing instructions is too low.
Flash corruption can easily be avoided by following these design recommendations (one is
sufficient):
1. Keep the AVR RESET active (low) during periods of insufficient power supply voltage.
This can be done by enabling the internal Brown-out Detector (BOD) if the operating
voltage matches the detection level. If not, an external low Vcc reset protection circuit
can be used. If a reset occurs while a write operation is in progress, the write opera-
tion will be completed provided that the power supply voltage is sufficient.
2. Keep the AVR core in Power-down sleep mode during periods of low Vcc. This will
prevent the CPU from attempting to decode and execute instructions, effectively pro-
tecting the SPMCSR Register and thus the Flash from unintentional writes.
20.2.6 Programming Time for Flash when Using SPM
The calibrated RC Oscillator is used to time Flash accesses. Table 20-2 shows the typical pro-
gramming time for Flash accesses from the CPU.
Table 20-2. SPM Programming Time
Symbol Min Programming Time Max Programming Time
Flash write (Page Erase, Page Write,
and write Lock bits by SPM)
3.7 ms 4.5 ms