Datasheet

181
7728G–AVR–06/10
ATtiny87/ATtiny167
15.6.1 LIN Control Register - LINCR
• Bit 7 - LSWRES: Software Reset
– 0 = No action,
– 1 = Software reset (this bit is self-reset at the end of the reset procedure).
• Bit 6 - LIN13: LIN 1.3 mode
– 0 = LIN 2.1 (default),
– 1 = LIN 1.3.
• Bit 5:4 - LCONF[1:0]: Configuration
a. LIN mode (default = 00):
– 00 = LIN Standard configuration (listen mode “off”, CRC “on” & Frame_Time_Out
“on”,
– 01 = No CRC, No Frame_Time_Out (listen mode “off”),
– 10 = No Frame_Time_Out (listen mode “off” & CRC “on”),
– 11 = Listening mode (CRC “on” & Frame_Time_Out “on”).
b. UART mode (default = 00):
– 00 = 8-bit, no parity (listen mode “off”),
– 01 = 8-bit, even parity (listen mode “off”),
– 10 = 8-bit, odd parity (listen mode “off”),
– 11 = Listening mode, 8-bit, no parity.
• Bit 3 - LENA: Enable
– 0 = Disable (both LIN and UART modes),
– 1 = Enable (both LIN and UART modes).
• Bit 2:0 - LCMD[2..0]: Command and mode
The command is only available if LENA is set.
– 000 = LIN Rx Header - LIN abort,
– 001 = LIN Tx Header,
– 010 = LIN Rx Response,
– 011 = LIN Tx Response,
– 100 = UART Rx & Tx Byte disable,
– 11x = UART Rx Byte enable,
– 1x1 = UART Tx Byte enable.
Bit 7 6543210
LSWRES LIN13 LCONF1 LCONF0 LENA LCMD2 LCMD1 LCMD0 LINCR
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value0 0000000