Datasheet

166
7728G–AVR–06/10
ATtiny87/ATtiny167
15.4.3 LIN/UART Controller Structure
Figure 15-4. LIN/UART Controller Block Diagram
15.4.4 LIN/UART Command Overview
Figure 15-5. LIN/UART Command Dependencies
BUFFER
FSM
RX
Get Byte
Frame Time-out
Synchronization
Monitoring
RxD
TX
Put Byte
Finite State Machine
TxD
BAUD_RATE
Prescaler
Sample /bit
CLK
IO
Data FIFO
IDOK
RXOK
Recommended
Way
TXOK
Tx Header
Rx Header
or
LIN Abort
Byte
Transfer
Rx
Byte
Tx
Byte
LIN
UART
Full
Duplex
DISABLE
Automatic
Return
Possible
Way
Response
Tx
Response
Rx